- 30 Jan, 2008 40 commits
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Roland McGrath authored
This revamps the vDSO linker script to lay things out with the best packing of the data and good, separate alignment of the code. The rigid layout using VDSO_TEXT_OFFSET no longer matters to the kernel. I've moved the layout parts of the linker script into a new include file, vdso-layout.lds.S; this is in preparation for sharing the script for the 32-bit vDSO builds too. Signed-off-by:
Roland McGrath <roland@redhat.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by:
Thomas Gleixner <tglx@linutronix.de> Signed-off-by:
Ingo Molnar <mingo@elte.hu> Signed-off-by:
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Roland McGrath authored
Get rid of vdso-syms.o from the kernel link. We don't need it any more. Signed-off-by:
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Roland McGrath authored
This patch changes the kernel's references to addresses in the vDSO image to be based on the symbols defined by vdso-syms.lds instead of the old vdso-syms.o symbols. This is all wrapped up in a macro defined by the new asm-x86/vdso.h header; that's the only place in the kernel source that has to know the details of the scheme for getting vDSO symbol values. Signed-off-by:
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Roland McGrath authored
This patch adds a new way of extracting symbols from the built vDSO image. This is much simpler and less fragile than using ld -R; it removes the need to control the DSO layout quite so exactly. I was clearly unduly distracted by clever ld uses when I did the original vDSO implementation. Signed-off-by:
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Jiri Kosina authored
Randomize the location of the heap (brk) for i386 and x86_64. The range is randomized in the range starting at current brk location up to 0x02000000 offset for both architectures. This, together with pie-executable-randomization.patch and pie-executable-randomization-fix.patch, should make the address space randomization on i386 and x86_64 complete. Arjan says: This is known to break older versions of some emacs variants, whose dumper code assumed that the last variable declared in the program is equal to the start of the dynamically allocated memory region. (The dumper is the code where emacs effectively dumps core at the end of it's compilation stage; this coredump is then loaded as the main program during normal use) iirc this was 5 years or so; we found this way back when I was at RH and we first did the security stuff there (including this brk randomization). It wasn't all variants of emacs, and it got fixed as a result (I vaguely remember that emacs already had code to deal with it for other archs/oses, just ifdeffed wrongly). It's a rare and wrong assumption as a general thing, just on x86 it mostly happened to be true (but to be honest, it'll break too if gcc does something fancy or if the linker does a non-standard order). Still its something we should at least document. Note 2: afaik it only broke the emacs *build*. I'm not 100% sure about that (it IS 5 years ago) though. [ akpm@linux-foundation.org: deuglification ] Signed-off-by:
Jiri Kosina <jkosina@suse.cz> Cc: Arjan van de Ven <arjan@infradead.org> Cc: Roland McGrath <roland@redhat.com> Cc: Jakub Jelinek <jakub@redhat.com> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
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Robert Richter authored
Also macro definitions in apicdef.h has been updated. Signed-off-by:
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Andi Kleen authored
Earlier patch added IO APIC setup into local APIC setup. This caused modpost warnings. Fix them by untangling setup_local_APIC() and splitting it into smaller functions. The IO APIC initialization is only called for the BP init. Also removed some outdated debugging code and minor cleanup. [ tglx: arch/x86 adaptation ] Signed-off-by:
Andi Kleen <ak@suse.de> Signed-off-by:
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Yinghai Lu authored
We shoud use core id bits instead of max cores, in case later with AMD downcores Quad core Opteron. [ tglx: arch/x86 adaptation ] Signed-off-by:
Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by:
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Yinghai Lu authored
We need to store core id bits to cpuinfo_x86 in early_identify_cpu. So we use it to create acpiid_to_node array in k8topolgy.c Signed-off-by:
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Adrian Bunk authored
Contrary to the comment "newer gccs do it by default", newer gcc versions default to -maccumulate-outgoing-args only with CONFIG_CC_OPTIMIZE_FOR_SIZE=n, and then only with some CPU settings. Measured with an i386 defconfig, gcc 4.2.1 and kernel 2.6.23-rc1 ("orig" is the plain kernel, "changed is with -maccumulate-outgoing-args removed): $ ls -la vmlinux* -rwxrwxr-x 1 bunk bunk 6269713 2007-07-24 22:19 vmlinux.changed -rwxrwxr-x 1 bunk bunk 6425361 2007-07-24 22:19 vmlinux.orig $ size vmlinux.* text data bss dec hex filename 4493465 504108 614400 5611973 55a1c5 vmlinux.changed 4646160 504108 614400 5764668 57f63c vmlinux.orig $ That's a 2.5% size increase that does for sure hurt small systems. If the stack unwinder ever comes back and needs this as indicated in the comment, adding it to the cflags when the user enabled the unwinder should be a better option. [ tglx: arch/x86 adaptation ] Signed-off-by:Adrian Bunk <bunk@stusta.de> Signed-off-by:
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Yinghai Lu authored
4 socket quad core, 8 socket quad core will do apic ID lifting for BSP. But io-apic regs for ExtINT still use 0 as dest. so when we enable apic error vector in BSP, we will get one APIC error. CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 512K (64 bytes/line) CPU 0/4 -> Node 0 CPU: Physical Processor ID: 1 CPU: Processor Core ID: 0 SMP alternatives: switching to UP code ACPI: Core revision 20070126 enabled ExtINT on CPU#0 ESR value after enabling vector: 00000000, after 0000000c APIC error on CPU0: 0c(08) ENABLING IO-APIC IRQs Synchronizing Arb IDs. So move enable_IO_APIC from setup_IO_APIC into setup_local_APIC and call it before enabling the ACPI error vector. [ tglx: arch/x86 adaptation ] Signed-off-by:
Yinghai Lu <yinghai.lu@sun.com> Signed-off-by:
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Thomas Gleixner authored
Clean it up before applying more patches to it. Signed-off-by:
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Steven Rostedt authored
So this patch simply removes the "thread" from asm-offsets.c since I can't find an owner for it. Signed-off-by:
Steven Rostedt <rostedt@goodmis.org> Cc: Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
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Dave Jones authored
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Dave Jones <davej@redhat.com> Signed-off-by:
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Thomas Gleixner authored
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Thomas Gleixner authored
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Thomas Gleixner authored
Reorder defines and do white space / coding style cleanups to get a readable diff. Also convert the macros to inline functions. Move the pci related inlines to pci.h Signed-off-by:
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Thomas Gleixner authored
Use the 64bit numa variable names for numa32 as well. Signed-off-by:
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Thomas Gleixner authored
Using a variable name, which is the same as a macro name is not really smart. Change the variable names and fixup all users. Signed-off-by:
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Thomas Gleixner authored
Clean it up before applying more patches. Signed-off-by:
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Thomas Gleixner authored
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Thomas Gleixner authored
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Thomas Gleixner authored
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Thomas Gleixner authored
Merge the files. [ mingo@elte.hu: build fix ] Signed-off-by:
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Thomas Gleixner authored
Fix coding style to get a readable diff Signed-off-by:
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Thomas Gleixner authored
Bring the smp.h variants into sync to prepare merging and paravirt support. Signed-off-by:
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Thomas Gleixner authored
The delta is now minimal. Merge them Signed-off-by:
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Thomas Gleixner authored
Bring the mpspec variants into sync to prepare merging and paravirt support. Signed-off-by:
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Thomas Gleixner authored
The delta is now minimal. Merge them Signed-off-by:
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Thomas Gleixner authored
Bring the tlbflush.h variants into sync to prepare merging and paravirt support. Signed-off-by:
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Thomas Gleixner authored
Merge them finally together Signed-off-by:
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Thomas Gleixner authored
Use _slock_t for the spinlock data types and replace the instructions by string defines, which makes the code of 32/64 bit versions more or less identical. Signed-off-by:
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Thomas Gleixner authored
Match the jump labels in the 32/64 variants and switch the 64bit version to symbols, so the functions are almost identical except for the operand size now. Signed-off-by:
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Thomas Gleixner authored
Use immediate instead of the RW_LOCK_BIAS_STR. Makes the code more readable and gets rid of the string constant. Signed-off-by:
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Thomas Gleixner authored
Use the correct constraints for the spinlock assembler functions. read (modify) write functions need "+m" instead of "=m" Signed-off-by:
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Glauber de Oliveira Costa authored
The cli and sti instructions need to be replaced by paravirt hooks. For the i386 architecture, this is already done. The code requirements aren't much different from x86_64 POV, so this part is consolidated in the common header Signed-off-by:
Glauber de Oliveira Costa <gcosta@redhat.com> Signed-off-by:
Jeremy Fitzhardinge <jeremy@xensource.com> Signed-off-by:
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Glauber de Oliveira Costa authored
This patch consolidates the irqflags include files containing common paravirt definitions. The native definition for interrupt handling, halt, and such, are the same for 32 and 64 bit, and they are kept in irqflags.h. the differences are split in the arch-specific files. The syscall function, irq_enable_sysexit, has a very specific i386 naming, and its name is then changed to a more general one. Signed-off-by:
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Hiroshi Shimamoto authored
clean up and make nmi_32/64.c more similar. - white space and coding style clean up. - nmi_cpu_busy is available on CONFIG_SMP. - move functions __acpi_nmi_enable, acpi_nmi_enable, __acpi_nmi_disable and acpi_nmi_disable. - make variables name more similar. Signed-off-by:
Hiroshi Shimamoto <h-shimamoto@ct.jp.nec.com> Signed-off-by:
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clameter@sgi.com authored
Clean up the allocation and freeing of stacks a bit by using a __GFP_ZERO flag instead of memset. Signed-off-by:
Christoph Lameter <clameter@sgi.com> Cc: Andi Kleen <ak@suse.de> Cc: Mike Travis <travis@sgi.com> Signed-off-by:
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Randy Dunlap authored
Coding style cleanups in x86/bitops_32.h: - drop space in "* addr" - whitespace & indentation fixes - spello fixes Signed-off-by:
Randy Dunlap <randy.dunlap@oracle.com> Signed-off-by:
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