- 13 Feb, 2017 26 commits
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Andy Shevchenko authored
Intel Gemini Lake is essentially Broxton with different PCI IDs. Add these new PCI IDs to the list of supported devices. Signed-off-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by:
Lee Jones <lee.jones@linaro.org>
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Chen-Yu Tsai authored
The AXP806 supports either master/standalone or slave mode. Slave mode allows sharing the serial bus, even with multiple AXP806 which all have the same hardware address. This is done with extra "serial interface address extension", or AXP806_BUS_ADDR_EXT, and "register address extension", or AXP806_REG_ADDR_EXT, registers. The former is read-only, with 1 bit customizable at the factory, and 1 bit depending on the state of an external pin. The latter is writable. Only when the these device addressing bits (in the upper 4 bits of the registers) match, will the device respond to operations on its other registers. The AXP806_REG_ADDR_EXT was previously configured by Allwinner's bootloader. Work on U-boot SPL support now allows us to switch to mainline U-boot, which doesn't do this for us. There might be other bare minimum bootloaders out there which don't to this either. It's best to handle this in the kernel. This patch sets AXP806_REG_ADDR_EXT to 0x10, which is what we know to be the proper value for a standard AXP806 in slave mode. Afterwards it will reinitialize the regmap cache, to purge any invalid stale values. Signed-off-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
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Shawn Nematbakhsh authored
Notify EC when going to or returning from suspend so that proper actions related to wake events can be taken. Signed-off-by:
Shawn Nematbakhsh <shawnn@chromium.org> Signed-off-by:
Thierry Escande <thierry.escande@collabora.com> Signed-off-by:
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Joseph Lo authored
The cros_ec driver is still active while the device is suspended. Besides that, it also tries to transfer data even after the I2C host had been suspended. This patch uses a simple flag to prevent this. Signed-off-by:
Joseph Lo <josephl@nvidia.com> Signed-off-by:
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Andrew Jeffery authored
The Aspeed SoC Display Controller is presented as a syscon device to arbitrate access by display and pinmux drivers. Video pinmux configuration on fifth generation SoCs depends on bits in both the System Control Unit and the Display Controller. Signed-off-by:
Andrew Jeffery <andrew@aj.id.au> Acked-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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Andrew Jeffery authored
The LPC bus pinmux configuration on fifth generation Aspeed SoCs depends on bits in both the System Control Unit and the LPC Host Controller. The Aspeed LPC Host Controller is described as a child node of the LPC host-range syscon device for arbitration of access by the host controller and pinmux drivers. Signed-off-by:
Linus Walleij <linus.walleij@linaro.org> Acked-by:
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Andrew Jeffery authored
Signed-off-by:
Joel Stanley <joel@jms.id.au> Acked-by:
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Andrew Jeffery authored
Whilst describing a device and not a bus, simple-mfd is modelled on simple-bus where child nodes are iterated and registered as platform devices. Some complex devices, e.g. the Aspeed LPC controller, can benefit from address space mapping such that child nodes can use the regs property to describe their resource offsets within the multi-function device. Signed-off-by:
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Andrew Jeffery authored
Signed-off-by:
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Quentin Schulz authored
MFD_SUN4I_GPADC and TOUCHSCREEN_SUN4I are incompatible (both are drivers for Allwinner SoCs' ADC). This makes sure TOUCHSCREEN_SUN4I isn't enabled while MFD_SUN4I_GPADC is enabled. Signed-off-by:
Quentin Schulz <quentin.schulz@free-electrons.com> Acked-by:
Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by:
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Colin Ian King authored
Trivial fix to spelling mistake in MFD headers. Signed-off-by:
Colin Ian King <colin.king@canonical.com> Signed-off-by:
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Quentin Schulz authored
The AXP223 shares most of its logic with the AXP221 but has some differences for the VBUS power supply driver. Thus, to probe the driver with the correct compatible, the AXP221 and the AXP223 now have separate MFD cells. AXP221 MFD cells are renamed from axp22x_cells to axp221_cells to avoid confusion. Signed-off-by:
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Hans de Goede authored
The axp288 pmic has a lot more volatile registers then we were listing in axp288_volatile_ranges, fix this. Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Acked-by:
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Hans de Goede authored
Add defines for the AXP288_POWER_REASON and AXP288_RT_BATT_V_H and AXP288_RT_BATT_V_L and AXP288_BC_* registers. While at it also move the AXP288_TS_ADC_H-AXP288_GP_ADC_L defines, which for some reason where in a different place, together with the rest of the AXP288 specific defines. Signed-off-by:
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Hans de Goede authored
The adc-enable register for the axp288 is 0x82, not 0x84. 0x82 is already defined as AXP20X_ADC_EN1 and that is what the axp288_adc driver is actually using, so simply drop the wrong AXP288_PMIC_ADC_EN define. Signed-off-by:
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Hans de Goede authored
The R in PEK_DBR stands for rising, so it should be mapped to AXP288_IRQ_POKP where the last P stands for positive edge. Likewise PEK_DBF should be mapped to the falling edge, aka the _N_egative edge, so it should be mapped to AXP288_IRQ_POKN. This fixes the inverted powerbutton status reporting by the axp20x-pek driver. Signed-off-by:
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Hans de Goede authored
The axp288 has the following irqs 2 times: VBUS_FALL, VBUS_RISE, VBUS_OV. On boot / reset the enable flags for both the normal and alt version of these irqs is set. Since we were only listing the normal version in the axp288 regmap_irq struct, we were never disabling the alt versions of these irqs. Add the alt versions to the axp288 regmap_irq struct, so that these get properly disabled. Together with the other axp288 fixes in this series, this fixes the axp288 irq contineously triggering. Signed-off-by:
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Hans de Goede authored
The interrupt line of the entire family of axp2xx pmics is active-low, for devicetree enumerated irqs, this is dealt with in the devicetree. ACPI irq resources have a flag field for this too, I tried using this on my CUBE iwork8 Air tablet, but it does not contain the right data. The dstd shows the irq listed as either ActiveLow or ActiveHigh, depending on the OSID variable, which seems to be set by the "OS IMAGE ID" in the BIOS/EFI setup screen. Since the acpi-resource info is no good, simply pass in IRQF_TRIGGER_LOW on the axp288. Together with the other axp288 fixes in this series, this fixes the axp288 irq contineously triggering. Signed-off-by:
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Corentin Labbe authored
The documentation of axp20x_device_remove() have a typo and use axp20x_device_probe() as name. This patch fix this typo. Signed-off-by:
Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by:
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Charles Keepax authored
This declaration has never been used and is likely some left over from early prototypes of the code, just remove it. Signed-off-by:
Charles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by:
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Chen-Yu Tsai authored
The PRCM block on the A23 contains a message box like interface to the registers for the analog path controls of the internal codec. Add a sub-device for it. Signed-off-by:
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Charles Keepax authored
Currently we leak a lot of things when tearing down the IRQs this patch fixes this cleaning up both the IRQ mappings and the IRQ domain itself. Signed-off-by:
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Charles Keepax authored
Signed-off-by:
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Charles Keepax authored
We have arizona_map_irq we might as well use it rather than hard coding it in several places. Signed-off-by:
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Lee Jones authored
Merge branches 'ib-mfd-arm-iio-pwm-4.11', 'ib-mfd-input-4.11-1', 'ib-mfd-mtd-4.11' and 'ib-mfd-power-supply-4.11' into ibs-for-mfd-merged
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Gwendal Grignou authored
Add switch to report tablet mode. Signed-off-by:
Gwendal Grignou <gwendal@chromium.org> Signed-off-by:
Enric Balletbo Serra <enric.balletbo@collabora.com> Signed-off-by:
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- 08 Feb, 2017 2 commits
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Douglas Anderson authored
On some newer boards using mkbp we're hooking up non-matrix buttons and switches to the EC but NOT to the main application processor. Let's add kernel support to handle this. Rather than creating a whole new input driver, we'll continue to use cros_ec_keyb and just report the new keys. Signed-off-by:
Douglas Anderson <dianders@chromium.org> Signed-off-by:
Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by:
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Douglas Anderson authored
Add the defines for the new buttons and switches connected to the CrosEC. Signed-off-by:
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- 25 Jan, 2017 3 commits
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Benjamin Gaignard authored
Timers IPs can be used to generate triggers for other IPs like DAC or ADC. Each trigger may result of timer internals signals like counter enable, reset or edge, this configuration could be done through "master_mode" device attribute. Since triggers could be used by DAC or ADC their names are defined in include/ nux/iio/timer/stm32-timer-trigger.h and is_stm32_iio_timer_trigger function could be used to check if the trigger is valid or not. "trgo" trigger have a "sampling_frequency" attribute which allow to configure timer sampling frequency. version 8: - change kernel version from 4.10 to 4.11 in ABI documentation version 7: - remove all iio_device related code - move driver into trigger directory version 5: - simplify tables of triggers - only create an IIO device when needed version 4: - get triggers configuration from "reg" in DT - add tables of triggers - sampling frequency is enable/disable when writing in trigger sampling_frequency attribute - no more use of interruptions version 3: - change compatible to "st,stm32-timer-trigger" - fix attributes access right - use string instead of int for master_mode and slave_mode - document device attributes in sysfs-bus-iio-timer-stm32 version 2: - keep only one compatible - use st,input-triggers-names and st,output-triggers-names to know which triggers are accepted and/or create by the device Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@st.com> Acked-by:
Jonathan Cameron <jic23@kernel.org> Signed-off-by:
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Benjamin Gaignard authored
Define bindings for STM32 timer trigger version 8: - reword "reg" parameter description version 4: - remove triggers enumeration from DT - add reg parameter version 3: - change file name - add cross reference with mfd bindings version 2: - only keep one compatible - add DT parameters to set lists of the triggers: one list describe the triggers created by the device another one give the triggers accepted by the device Signed-off-by:
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Benjamin Gaignard authored
This driver adds support for PWM driver on STM32 platform. The SoC have multiple instances of the hardware IP and each of them could have small differences: number of channels, complementary output, auto reload register size... version 9: - fix commit message header - remove one space MODULE_ALIAS version 8: - fix comments done by Thierry on version 7 version 6: - change st,breakinput parameter to make it usuable for stm32f7 too. version 4: - detect at probe time hardware capabilities - fix comments done on v2 and v3 - use PWM atomic ops version 2: - only keep one comptatible - use DT parameters to discover hardware block configuration Signed-off-by:
Thierry Reding <treding@nvidia.com> Signed-off-by:
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- 23 Jan, 2017 3 commits
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Benjamin Gaignard authored
Define bindings for pwm-stm32 version 9: - change commit message header version 8: - reword st,breakinput description. version 6: - change st,breakinput parameter format to make it usuable on stm32f7 too. version 2: - use parameters instead of compatible of handle the hardware configuration Signed-off-by:
Thierry Reding <thierry.reding@gmail.com> Signed-off-by:
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Benjamin Gaignard authored
This hardware block could at used at same time for PWM generation and IIO timers. PWM and IIO timer configuration are mixed in the same registers so we need a multi fonction driver to be able to share those registers. version 7: - rebase on v4.10-rc2 version 6: - rename files to stm32-timers - rename functions to stm32_timers_xxx version 5: - fix Lee comments about detect function - add missing dependency on REGMAP_MMIO version 4: - add a function to detect Auto Reload Register (ARR) size - rename the structure shared with other drivers version 2: - rename driver "stm32-gptimer" to be align with SoC documentation - only keep one compatible - use of_platform_populate() instead of devm_mfd_add_devices() Signed-off-by:
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Benjamin Gaignard authored
Add bindings information for STM32 Timers version 6: - rename stm32-gtimer to stm32-timers - change compatible - add description about the IPs version 2: - rename stm32-mfd-timer to stm32-gptimer - only keep one compatible string Signed-off-by:
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- 04 Jan, 2017 3 commits
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Hans de Goede authored
When the axp288_faul_gauge driver was originally merged, it was merged with a dependency on some other driver providing platform data for it. However the battery-data-framework which should provide that data never got merged, resulting in x86 tablets / laptops with an axp288 having no working battery monitor, as before this commit the driver would simply return -ENODEV if there is no platform data. This commit removes the dependency on the platform_data instead checking that the firmware has initialized the fuel-gauge and reading the info back from the pmic. What is missing from the read-back info is the table to map raw adc values to temperature, so this commit drops the temperature and temperature limits properties. The min voltage, charge design and model name info is also missing. Note that none of these are really important for userspace to have. All other functionality is preserved and actually made available by this commit. BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=88471Signed-off-by:
Sebastian Reichel <sre@kernel.org>
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Hans de Goede authored
When the axp288_charger driver was originally merged, it was merged with a dependency on some other driver providing platform data for it. However the battery-data-framework which should provide that data never got merged, so the axp288_charger as merged upstream has never worked, its probe method simply always returns -ENODEV. This commit removes the dependency on the platform_data instead reading back the charging current and charging voltage that the firmware has set and using those values as the maximum values the user may set. Signed-off-by:
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Hans de Goede authored
Make charger_init_hw_regs propagate i2c errors, instead of only warning about them and then ignoring them. Signed-off-by:
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- 03 Jan, 2017 3 commits
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Mika Westerberg authored
Intel Apollo Lake SoC exposes serial SPI flash through the LPC device. The SPI flash host controller is not discoverable through PCI config cycles because P2SB (function 0 of the device 13) is hidden by the BIOS. We unhide the device briefly in order to read BAR 0 of the SPI host controller. Signed-off-by:
Marek Vasut <marek.vasut@gmail.com> Signed-off-by:
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Mika Westerberg authored
Many Intel CPUs including Haswell, Broadwell and Baytrail have SPI serial flash host controller as part of the LPC device. This will populate an MFD cell suitable for the SPI host controller driver if we know that the LPC device has one. Signed-off-by:
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Mika Westerberg authored
Add support for the SPI serial flash host controller found on many Intel CPUs including Baytrail and Braswell. The SPI serial flash controller is used to access BIOS and other platform specific information. By default the driver exposes a single read-only MTD device but with a module parameter "writeable=1" the MTD device can be made read-write which makes it possible to upgrade BIOS directly from Linux. Signed-off-by:
Cyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by:
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