- 30 Apr, 2024 40 commits
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Revalla Hari Krishna authored
[why] cleaning up the code refactor requires hubbub to be in its own component. [how] Move all files under newly created hubbub folder and fix the makefiles. Reviewed-by: Martin Leung <martin.leung@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Revalla Hari Krishna <harikrishna.revalla@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alvin Lee authored
[Description] Today for MED update type we do not call update clocks. However, for FPO the assumption is that update clocks should be called to disable P-State switch before any HW programming since FPO in FW and driver are not synchronized. This causes an issue where on a MED update, an FPO P-State switch could be taking place, then driver forces P-State disallow in the below code and prevents FPO from completing the sequence. In this case we add a check to avoid re-programming (and thus re-setting) the P-State force register by only reprogramming if the pipe was not previously Subvp or FPO. The assumption is that the P-State force register should be programmed correctly the first time SubVP / FPO was enabled, so there's no need to update / reset it if the pipe config has never exited SubVP / FPO. Reviewed-by: Samson Tam <samson.tam@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Webb Chen authored
This reverts commit 4d4d3ff1 ("drm/amd/display: Keep VBios pixel rate div setting util next mode set") which causes issue. Reviewed-by: Charlene Liu <charlene.liu@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Webb Chen <yi-lchen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Daniel Miess authored
[Why & How] Enable root clock optimization for PHYSYMCLK and only disable it when it's actively being used v2: Fix array-index-out-of-bounds in dcn35_calc_blocks_to_gate Reviewed-by: Roman Li <roman.li@amd.com> Reviewed-by: Charlene Liu <charlene.liu@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Daniel Miess <daniel.miess@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Nicholas Kazlauskas authored
[Why] FIFO error can occur if we don't trigger a DISPCLK change after touching K1/K2 dividers. For 4k144 eDP + hotplug of USB-C DP display we see FIFO underflow. [How] We have the path to trigger the resync as the workaround in DCN314/DCN32, it just needs to be ported over to DCN35. Reviewed-by: Charlene Liu <charlene.liu@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Roman Li authored
[Why] IPS stability was fixed in bios. [How] Set disable_ips init flag to DMUB_IPS_ENABLE. Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Roman Li <roman.li@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Wenjing Liu authored
[why] DSC slice must be divisible by ODM slice count. [how] If DSC slice count is not a multiple of ODM slice count, increase DSC slice until it is. Otherwise fail to compute DSC configuration. Reviewed-by: Chaitanya Dhere <chaitanya.dhere@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Leo Ma authored
[Why && How] Screen flickering saw on 4K@60 eDP with high refresh rate external monitor when booting up in DC mode. DC Mode Capping is disabled which caused wrong UCLK being used. Reviewed-by: Alvin Lee <alvin.lee2@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Leo Ma <hanghong.ma@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Wayne Lin authored
[Why] Like commit ec5fa9fc ("drm/amd/display: Adjust the MST resume flow"), we want to avoid handling mst topology changes before restoring the old state. If we enable DP_UP_REQ_EN before calling drm_atomic_helper_resume(), have changce to handle CSN event first and fire hotplug event before restoring the cached state. [How] Disable mst branch sending up request event before we restoring the cached state. DP_UP_REQ_EN will be set later when we call drm_dp_mst_topology_mgr_resume(). Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Reviewed-by: Hersen Wu <hersenxs.wu@amd.com> Signed-off-by: Wayne Lin <wayne.lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Iswara Nagulendran authored
[HOW&WHY] In multi-monitor cases the VBLANK stretch that is required to align both monitors may be so large that it may create issues for gaming performance. Use debug value to restrict in-game FAMS support for multi-disp use case. Reviewed-by: Harry Vanzylldejong <harry.vanzylldejong@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Iswara Nagulendran <iswara.nagulendran@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Dennis Chan authored
[why] To refine for link off frame count in diagnose tool, the driver show the link off frame count number instead of showing link off frame count level. Reviewed-by: ChunTao Tso <chuntao.tso@amd.com> Reviewed-by: Robin Chen <robin.chen@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Dennis Chan <dennis.chan@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Rodrigo Siqueira authored
Add code to handle case when quad_part is 0 in gpu_addr_to_uma(). Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Rodrigo Siqueira authored
Set up to enable log color state for multiple DCNs. Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Rodrigo Siqueira authored
This commit just remove some trivial legacy code in some of the DC files. Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Rodrigo Siqueira authored
Adjust to update some of the dcn303 parameters. Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Rodrigo Siqueira authored
Set up to enable legacy fast update. Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Rodrigo Siqueira authored
Add dcn301_fpu prefix to some of the FPU function with the required adjustments. Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Rodrigo Siqueira authored
Add VCO speed parameters in the bounding box array. Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Wayne Lin authored
[Why & How] We accidentally upstream unnecessary files. Remove them. Reviewed-by: Tom Chung <chiahsuan.chung@amd.com> Signed-off-by: Wayne Lin <Wayne.Lin@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Rodrigo Siqueira authored
This commit just update the code style in two if conditions and in an static array. Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Rodrigo Siqueira authored
This commit add PP_SMU_VER_VG to the pp_smu_ver list. Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Rodrigo Siqueira authored
Add REG_SEQ_SUBMIT and REG_SEQ_WAIT_DONE to optimize the burst write for the regama lut. Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Harry Wentland authored
Some IGT tests fail with the new atomic cursor updates when running on older DCE-based ASICs. To work around these issues keep calling the amdgpu_dm_commit_cursors for each cursor update on DCE, even if those cursor updates coincide with other plane updates. Reviewed-by: Agustin Gutierrez <agustin.gutierrez@amd.com> Reviewed-by: Sun peng Li <sunpeng.li@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Harry Wentland <harry.wentland@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Yang Wang authored
- remove unused callback functions. - make part of mca functions static and refine the function order. Signed-off-by: Yang Wang <kevinyang.wang@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Harry Wentland authored
Cursors are always programmed independently of updates on other planes. When atomic commits program cursor and surface updates together the cursor update might be locked out by the surface update and not take effect. To combat this program cursor and surface updates together via dc_update_planes_and_stream to ensure they can be applied atomically. When cursor updates come on their own use the old method to program the cursor as dc_update_planes_and_stream isn't handling this case correctly (yet), leading to a flickering screen. Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/2186Reviewed-by: Agustin Gutierrez <agustin.gutierrez@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Harry Wentland <harry.wentland@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Hawking Zhang authored
v1: Add mmhub v4_1_0 register offset and shift masks header files. (Hawking) v2: Update mmhub v4_1_0 register offset and shift masks header files to RE2. (Likun) v3: Update mmhub v4_1_0 register offset and shift masks header files to RE2.5 (Likun) v4: Clean up mmhub v4_1_0 ip headers (Alex) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Aric Cyr authored
Summary: * Changes across DSC, MST, DMCUB, Panel Replay and misc fixes. * Fixes to cursor programming sequence * Add some missing register defs * Formatting/Sytle fixes Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Aric Cyr <aric.cyr@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Anthony Koo authored
- Adjust the dmub_fw_boot_options reserved bits to be correct Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Anthony Koo <anthony.koo@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Likun Gao authored
Add common soc24 ip block. v2: squash in updates (Alex) Signed-off-by: Likun Gao <Likun.Gao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Rodrigo Siqueira authored
The string dp_hdmi_dongle_signature_str already uses u8 but the string dp_hdmi_dongle_signature_str does not. Just replace uint8_t with u8 for dp_hdmi_dongle_signature_str. Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Jack Xiao authored
Adjust mes queue initialization before kgq/kcq initialization to enable mes mapping legacy queue. Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Jack Xiao authored
Add mes11 map legacy queue packet submission. Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Sung Joon Kim authored
[why & how] There are potential issues with Z8 and IPS that need to be addressed and need to add in missing function pointers. Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Sung Joon Kim <sungjoon.kim@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
This reverts drm/amdgpu: fix ftrace event amdgpu_bo_move always move on same heap. The basic problem here is that after the move the old location is simply not available any more. Some fixes were suggested, but essentially we should call the move notification before actually moving things because only this way we have the correct order for DMA-buf and VM move notifications as well. Also rework the statistic handling so that we don't update the eviction counter before the move. v2: add missing NULL check Signed-off-by: Christian König <christian.koenig@amd.com> Fixes: 94aeb411 ("drm/amdgpu: fix ftrace event amdgpu_bo_move always move on same heap") Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3171Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> CC: stable@vger.kernel.org
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Webb Chen authored
[why] VBios & Driver may have differnet pixel rate div policy. If the policy is not same and fast boot is enabled, it would cause the pixel rate is too high after driver only performs stream blank & unblank. [how] We would keep pixel rate div setting by VBios until next mode set. Reviewed-by: Jun Lei <jun.lei@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Webb Chen <yi-lchen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Cruise authored
[Why] Error correction was enabled in a monitor which doesn't support. [How] Disable error correction if it's not supported Reviewed-by: Wenjing Liu <wenjing.liu@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Cruise <cruise.hung@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Sung Joon Kim authored
[why & how] The recout x offset was incorrect which led to wrong viewport calculation. For stereo side-by-side case, the slice index should be 0 for both split pipes. Reviewed-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Sung Joon Kim <sungjoon.kim@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Harry Wentland authored
HWSS set_cursor_attributes copies the stream's cursor attributes to the hubp cursor attributes. set_cursor_position might attempt to program the cursor attributes but will program them wrong if they're not set correctly. We need to call HWSS set_cursor_attributes first to ensure hubp has the right attributes to be programmed. Reviewed-by: Agustin Gutierrez <agustin.gutierrez@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Harry Wentland <harry.wentland@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Harry Wentland authored
We're seeing issues when user-space tries to do an atomic update of the primary surface, as well as the cursor. These two updates are separate calls into DC and don't currently act as an atomic update. This might lead to cursor updates being locked out and cursors stuttering. In order to solve this problem we want to separate the setting and programming of cursor attributes and position. That's what we're doing in this patch. The subsequent patch will then be able to use the cursor setters in independent cursor updates, as well as in atomic commits. Reviewed-by: Agustin Gutierrez <agustin.gutierrez@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Harry Wentland <harry.wentland@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Joshua Aberback authored
This reverts commit 0a571e86. [Why] The change being reverted incorrectly assumes that a pointer type was intended, however copying to a new structure is correct. As well, there is no compiler error, it was instead an error in the testing framework being used. Reviewed-by: Chaitanya Dhere <chaitanya.dhere@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Joshua Aberback <joshua.aberback@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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