- 22 Oct, 2010 4 commits
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Mike Frysinger authored
Also document the mailbox (channel) data array layout. Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
Now that the common 8250 serial driver supports an "irqflags" field, we don't need to patch in a custom define into the code. Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Sonic Zhang authored
Flushing caches sometimes requires anomaly workarounds which require supervisor-only insns. Normally we don't need to flush caches from userspace so this isn't a problem, but when gcc generates trampolines on the stack, we do. So add a new syscall for gcc to use modeled after the mips version. Signed-off-by:
Sonic Zhang <sonic.zhang@analog.com> Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Robin Getz authored
Nothing actually needs to use these MMRs (as direct cache manipulation is done with the DTEST MMRs), so simply hide the read funcs behind the anomaly define. They're generally unusable anyways when this anomaly is in effect. Signed-off-by:
Robin Getz <robin.getz@analog.com> Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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- 18 Oct, 2010 4 commits
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Mike Frysinger authored
While combining things, also switch to the proper SPI bit define names. This lets us punt the rarely used SPI defines. Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Barry Song authored
The common SPI layers take care of detecting CS conflicts and preventing two devices from claiming the same CS. This causes problems for the GPIO CS support we currently have as we are using CS0 to mean "GPIO CS". But if we have multiple devices using a GPIO CS, the common SPI layers see multiple devices using the virtual "CS0" and reject any such attempts. To make both work, we introduce an offset define. This represents the max number of hardware CS values that the SPI peripheral supports. If the CS is below this limit, we know we can use the hardware CS. If it's above, we treat it as a GPIO CS. This keeps the CS unique as seen by the common code and prevents conflicts. Signed-off-by:
Barry Song <barry.song@analog.com> Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
Expand the BIT_CTL defines to use the naming convention of the hardware, and expand the masks to cover all documented bits. Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
As David points out, the cs_change_per_word option isn't standard, nor is anyone actually using it. So punt all of the dead code considering it makes up ~10% of the code size. Reported-by:
David Brownell <dbrownell@users.sourceforge.net> Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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- 07 Oct, 2010 3 commits
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David Howells authored
Fix the IRQ flag handling naming. In linux/irqflags.h under one configuration, it maps: local_irq_enable() -> raw_local_irq_enable() local_irq_disable() -> raw_local_irq_disable() local_irq_save() -> raw_local_irq_save() ... and under the other configuration, it maps: raw_local_irq_enable() -> local_irq_enable() raw_local_irq_disable() -> local_irq_disable() raw_local_irq_save() -> local_irq_save() ... This is quite confusing. There should be one set of names expected of the arch, and this should be wrapped to give another set of names that are expected by users of this facility. Change this to have the arch provide: flags = arch_local_save_flags() flags = arch_local_irq_save() arch_local_irq_restore(flags) arch_local_irq_disable() arch_local_irq_enable() arch_irqs_disabled_flags(flags) arch_irqs_disabled() arch_safe_halt() Then linux/irqflags.h wraps these to provide: raw_local_save_flags(flags) raw_local_irq_save(flags) raw_local_irq_restore(flag...
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David Howells authored
Rename h/w IRQ flags handling functions to be in line with what is expected for the irq renaming patch. This renames local_*_hw() to hard_local_*() using the following perl command: perl -pi -e 's/local_irq_(restore|enable|disable)_hw/hard_local_irq_\1/ or s/local_irq_save_hw([_a-z]*)[(]flags[)]/flags = hard_local_irq_save\1()/' `find arch/blackfin/ -name "*.[ch]"` and then fixing up asm/irqflags.h manually. Additionally, arch/hard_local_save_flags() and arch/hard_local_irq_save() both return the flags rather than passing it through the argument list. Signed-off-by:
David Howells <dhowells@redhat.com>
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David Howells authored
Add a missing dependency (mach/blackfin.h) to asm/irqflags.h so that bfin_read_IMASK() can be used by inline functions. Signed-off-by:
David Howells <dhowells@redhat.com>
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- 27 Aug, 2010 1 commit
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Mike Frysinger authored
The common bfin_sport.h header now has unified definitions of these, so stop polluting the global namespace. Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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- 23 Aug, 2010 2 commits
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Mike Frysinger authored
Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
The recent commit to add constant optimization to hweight implicitly broke the Blackfin arch. Seems we were missed when all the other arches were fixed with renames. Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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- 14 Aug, 2010 1 commit
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Sam Ravnborg authored
unifdef-y and header-y have same semantic, so drop unifdef-y Signed-off-by:
Sam Ravnborg <sam@ravnborg.org>
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- 11 Aug, 2010 3 commits
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FUJITA Tomonori authored
Architectures implement dma_is_consistent() in different ways (some misinterpret the definition of API in DMA-API.txt). So it hasn't been so useful for drivers. We have only one user of the API in tree. Unlikely out-of-tree drivers use the API. Even if we fix dma_is_consistent() in some architectures, it doesn't look useful at all. It was invented long ago for some old systems that can't allocate coherent memory at all. It's better to export only APIs that are definitely necessary for drivers. Let's remove this API. Signed-off-by:
FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Cc: James Bottomley <James.Bottomley@HansenPartnership.com> Reviewed-by:
Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: <linux-arch@vger.kernel.org> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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FUJITA Tomonori authored
dma_get_cache_alignment returns the minimum DMA alignment. Architectures defines it as ARCH_DMA_MINALIGN (formally ARCH_KMALLOC_MINALIGN). So we can unify dma_get_cache_alignment implementations. Note that some architectures implement dma_get_cache_alignment wrongly. dma_get_cache_alignment() should return the minimum DMA alignment. So fully-coherent architectures should return 1. This patch also fixes this issue. Signed-off-by:
FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Cc: <linux-arch@vger.kernel.org> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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FUJITA Tomonori authored
Now each architecture has the own dma_get_cache_alignment implementation. dma_get_cache_alignment returns the minimum DMA alignment. Architectures define it as ARCH_KMALLOC_MINALIGN (it's used to make sure that malloc'ed buffer is DMA-safe; the buffer doesn't share a cache with the others). So we can unify dma_get_cache_alignment implementations. This patch: dma_get_cache_alignment() needs to know if an architecture defines ARCH_KMALLOC_MINALIGN or not (needs to know if architecture has DMA alignment restriction). However, slab.h define ARCH_KMALLOC_MINALIGN if architectures doesn't define it. Let's rename ARCH_KMALLOC_MINALIGN to ARCH_DMA_MINALIGN. ARCH_KMALLOC_MINALIGN is used only in the internals of slab/slob/slub (except for crypto). Signed-off-by:
FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Cc: <linux-arch@vger.kernel.org> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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- 07 Aug, 2010 1 commit
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FUJITA Tomonori authored
Architectures don't need to define ISA_DMA_THRESHOLD anymore. Signed-off-by:
FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by:
James Bottomley <James.Bottomley@suse.de> Acked-by:
David Howells <dhowells@redhat.com> Signed-off-by:
Jens Axboe <jaxboe@fusionio.com>
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- 06 Aug, 2010 12 commits
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Mike Frysinger authored
The GPIO API was extended recently to include debounce functions, but since the on-chip Blackfin GPIO modules don't support this stuff, make a stub in the non-GPIOLIB case so drivers build properly. Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Christian Dietrich authored
MEM_GENERIC_BOARD depends on GENERIC_BOARD, but this flag was removed in 4f25eb85 , therefore all references to it from the source can be removed. Signed-off-by:
Christian Dietrich <qy03fugy@stud.informatik.uni-erlangen.de> Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
Avoid duplication and ugly global namespace pollution. Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
Avoid duplication and ugly global namespace pollution. Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
These were partially defined, so fill out the def/cdef pieces properly. Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
Random tabs instead of spaces, mixes of the two, and unicode spaces instead of ascii spaces. Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Michael Hennerich authored
Add SSYNC to our implementation of I/O write barrier to ensure ordering of I/O space writes. This will make sure that writes following the barrier will arrive after all previous writes. Signed-off-by:
Michael Hennerich <michael.hennerich@analog.com> Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Michael Hennerich authored
The dma_memcpy() function takes care of flushing different caches for us. Normally this is what we want, but when resuming from mem, we don't yet have caches enabled. If these functions happen to be placed into L1 mem (which is what we're trying to relocate), then things aren't going to work. So define a non-cache dma_memcpy() variant to utilize in situations like this. Signed-off-by:
Michael Hennerich <michael.hennerich@analog.com> Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
Run ONES on the incoming value rather than random garbage. This fixes random crashes with some networking code. Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
The Blackfin processor has no FPU, so there are no FPU regs to dump. Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Mike Frysinger authored
These are useful when working with C structs of MMRs as the appropriate size is selected based on the given argument. Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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- 05 Aug, 2010 1 commit
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Barry Song authored
Rather than forcing the platform resources to declare the desired page size, simply use the existing information passed down to us by the higher layers. This way we work out of the box with all flash chips that the kernel knows about. Signed-off-by:
Barry Song <barry.song@analog.com> Signed-off-by:
Mike Frysinger <vapier@gentoo.org> Signed-off-by:
David Woodhouse <David.Woodhouse@intel.com>
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- 09 Jun, 2010 1 commit
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Peter Zijlstra authored
On 64bit, local_t is of size long, and thus we make local64_t an alias. On 32bit, we fall back to atomic64_t. (architecture can provide optimized 32-bit version) (This new facility is to be used by perf events optimizations.) Signed-off-by:
Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: linux-arch@vger.kernel.org Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> LKML-Reference: <new-submission> Signed-off-by:
Ingo Molnar <mingo@elte.hu>
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- 27 May, 2010 1 commit
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FUJITA Tomonori authored
Signed-off-by:
FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Cc: Mike Frysinger <vapier@gentoo.org> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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- 22 May, 2010 5 commits
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FUJITA Tomonori authored
Architectures that handle DMA-non-coherent memory need to set ARCH_KMALLOC_MINALIGN to make sure that kmalloc'ed buffer is DMA-safe: the buffer doesn't share a cache with the others. Signed-off-by:
FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by:
Pekka Enberg <penberg@cs.helsinki.fi> Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Robin Getz authored
Since 'extern inline' doesn't work correctly in the context of the Linux kernel (too many overriding defines), move the string functions to normal lib/ assembly files (like the existing mem funcs). This avoids the forced inline all over the kernel and allows us to place them constantly in L1. This also avoids some module failures when gcc inserts calls to string functions but the kernel build system doesn't fully consult the library archives. Signed-off-by:
Robin Getz <robin.getz@analog.com> Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Robin Getz authored
Another pseudo insn used by Blackfin simulators. Also factor some now common register lookup code out of the DBGA handlers. Signed-off-by:
Robin Getz <robin.getz@analog.com> Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Robin Getz authored
The current BUG opcode includes the bit that flags the insn as a 32bit opcode, but it wasn't declaring it as 32bits. So pick an unused 16bit. URL: http://blackfin.uclinux.org/gf/tracker/5973 Signed-off-by:
Robin Getz <robin.getz@analog.com> Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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Robin Getz authored
A few pseudo debug insns exist to make testing of simulators easier. Since these don't actually exist in the hardware, we have to have the exception handler take care of emulating these. This allows sim test cases to be executed unmodified under Linux and thus simplify debugging greatly. Signed-off-by:
Robin Getz <robin.getz@analog.com> Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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- 21 May, 2010 1 commit
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Graf Yang authored
Newer code in mm/page_alloc.c requires this function now in arches. Signed-off-by:
Graf Yang <graf.yang@analog.com> Signed-off-by:
Mike Frysinger <vapier@gentoo.org>
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