1. 08 Feb, 2017 4 commits
  2. 07 Feb, 2017 3 commits
    • Chris Wilson's avatar
      drm/i915: Restore context and pd for ringbuffer submission after reset · c0dcb203
      Chris Wilson authored
      Following a reset, the context and page directory registers are lost.
      However, the queue of requests that we resubmit after the reset may
      depend upon them - the registers are restored from a context image, but
      that restore may be inhibited and may simply be absent from the request
      if it was in the middle of a sequence using the same context. If we
      prime the CCID/PD registers with the first request in the queue (even
      for the hung request), we prevent invalid memory access for the
      following requests (and continually hung engines).
      
      v2: Magic BIT(8), reserved for future use but still appears unused.
      v3: Some commentary on handling innocent vs guilty requests
      v4: Add a wait for PD_BASE fetch. The reload appears to be instant on my
      Ivybridge, but this bit probably exists for a reason.
      
      Fixes: 821ed7df ("drm/i915: Update reset path to fix incomplete requests")
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
      Cc: Mika Kuoppala <mika.kuoppala@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/20170207152437.4252-1-chris@chris-wilson.co.ukReviewed-by: default avatarMika Kuoppala <mika.kuoppala@intel.com>
      c0dcb203
    • Arthur Heymans's avatar
      6248017a
    • Chris Wilson's avatar
      drm/i915: Remove overzealous fence warn on runtime suspend · e0ec3ec6
      Chris Wilson authored
      The goal of the WARN was to catch when we are still actively using the
      fence as we go into the runtime suspend. However, the reg->pin_count is
      too coarse as it does not distinguish between exclusive ownership of the
      fence register from activity.
      
      I've not improved on the WARN, nor have we captured this WARN in an
      exact igt, but it is showing up regularly in the wild:
      
      [ 1915.935332] WARNING: CPU: 1 PID: 10861 at drivers/gpu/drm/i915/i915_gem.c:2022 i915_gem_runtime_suspend+0x116/0x130 [i915]
      [ 1915.935383] WARN_ON(reg->pin_count)[ 1915.935399] Modules linked in:
       snd_hda_intel i915 drm_kms_helper vgem netconsole scsi_transport_iscsi fuse vfat fat x86_pkg_temp_thermal coretemp intel_cstate intel_uncore snd_hda_codec_hdmi snd_hda_codec_generic snd_hda_codec snd_hwdep snd_hda_core snd_pcm snd_timer snd mei_me mei serio_raw intel_rapl_perf intel_pch_thermal soundcore wmi acpi_pad i2c_algo_bit syscopyarea sysfillrect sysimgblt fb_sys_fops drm r8169 mii video [last unloaded: drm_kms_helper]
      [ 1915.935785] CPU: 1 PID: 10861 Comm: kworker/1:0 Tainted: G     U  W       4.9.0-rc5+ #170
      [ 1915.935799] Hardware name: LENOVO 80MX/Lenovo E31-80, BIOS DCCN34WW(V2.03) 12/01/2015
      [ 1915.935822] Workqueue: pm pm_runtime_work
      [ 1915.935845]  ffffc900044fbbf0 ffffffffac3220bc ffffc900044fbc40 0000000000000000
      [ 1915.935890]  ffffc900044fbc30 ffffffffac059bcb 000007e6044fbc60 ffff8801626e3198
      [ 1915.935937]  ffff8801626e0000 0000000000000002 ffffffffc05e5d4e 0000000000000000
      [ 1915.935985] Call Trace:
      [ 1915.936013]  [<ffffffffac3220bc>] dump_stack+0x4f/0x73
      [ 1915.936038]  [<ffffffffac059bcb>] __warn+0xcb/0xf0
      [ 1915.936060]  [<ffffffffac059c4f>] warn_slowpath_fmt+0x5f/0x80
      [ 1915.936158]  [<ffffffffc052d916>] i915_gem_runtime_suspend+0x116/0x130 [i915]
      [ 1915.936251]  [<ffffffffc04f1c74>] intel_runtime_suspend+0x64/0x280 [i915]
      [ 1915.936277]  [<ffffffffac0926f1>] ? dequeue_entity+0x241/0xbc0
      [ 1915.936298]  [<ffffffffac36bb85>] pci_pm_runtime_suspend+0x55/0x180
      [ 1915.936317]  [<ffffffffac36bb30>] ? pci_pm_runtime_resume+0xa0/0xa0
      [ 1915.936339]  [<ffffffffac4514e2>] __rpm_callback+0x32/0x70
      [ 1915.936356]  [<ffffffffac451544>] rpm_callback+0x24/0x80
      [ 1915.936375]  [<ffffffffac36bb30>] ? pci_pm_runtime_resume+0xa0/0xa0
      [ 1915.936392]  [<ffffffffac45222d>] rpm_suspend+0x12d/0x680
      [ 1915.936415]  [<ffffffffac69f6d7>] ? _raw_spin_unlock_irq+0x17/0x30
      [ 1915.936435]  [<ffffffffac0810b8>] ? finish_task_switch+0x88/0x220
      [ 1915.936455]  [<ffffffffac4534bf>] pm_runtime_work+0x6f/0xb0
      [ 1915.936477]  [<ffffffffac074353>] process_one_work+0x1f3/0x4d0
      [ 1915.936501]  [<ffffffffac074678>] worker_thread+0x48/0x4e0
      [ 1915.936523]  [<ffffffffac074630>] ? process_one_work+0x4d0/0x4d0
      [ 1915.936542]  [<ffffffffac074630>] ? process_one_work+0x4d0/0x4d0
      [ 1915.936559]  [<ffffffffac07a2c9>] kthread+0xd9/0xf0
      [ 1915.936580]  [<ffffffffac07a1f0>] ? kthread_park+0x60/0x60
      [ 1915.936600]  [<ffffffffac69fe62>] ret_from_fork+0x22/0x30
      
      In the case the register is pinned, it should be present and we will
      need to invalidate them to be restored upon resume as we cannot expect
      the owner of the pin to call get_fence prior to use after resume.
      
      Fixes: 7c108fd8 ("drm/i915: Move fence cancellation to runtime suspend")
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98804Reported-by: default avatarLionel Landwerlin <lionel.g.landwerlin@linux.intel.com>
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
      Cc: Imre Deak <imre.deak@linux.intel.com>
      Cc: Jani Nikula <jani.nikula@linux.intel.com>
      Cc: <drm-intel-fixes@lists.freedesktop.org> # v4.10-rc1+
      Link: http://patchwork.freedesktop.org/patch/msgid/20170203125717.8431-1-chris@chris-wilson.co.ukReviewed-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
      e0ec3ec6
  3. 06 Feb, 2017 18 commits
  4. 04 Feb, 2017 1 commit
  5. 03 Feb, 2017 6 commits
  6. 02 Feb, 2017 3 commits
  7. 01 Feb, 2017 5 commits
    • Maarten Lankhorst's avatar
      drm/i915: Fix POWER_DOMAIN_AUDIO refcounting. · 37255d8d
      Maarten Lankhorst authored
      If the crtc was brought up with audio before the driver loads,
      then crtc_disable will remove a refcount to audio that doesn't exist
      before.
      
      Fortunately we already set power domains on readout, so we can just add
      the power domain handling to get_crtc_power_domains, which will update
      the power domains correctly in all cases.
      
      This was found when testing module reload on CI with the crtc enabled,
      which resulted in the following warn after module reload + modeset:
      
      [   24.197041] ------------[ cut here ]------------
      [   24.197075] WARNING: CPU: 0 PID: 99 at drivers/gpu/drm/i915/intel_runtime_pm.c:1790 intel_display_power_put+0x134/0x140 [i915]
      [   24.197076] Use count on domain AUDIO is already zero
      [   24.197098] CPU: 0 PID: 99 Comm: kworker/u8:2 Not tainted 4.9.0-CI-Trybot_393+ #1
      [   24.197099] Hardware name:                  /NUC6i5SYB, BIOS SYSKLi35.86A.0042.2016.0409.1246 04/09/2016
      [   24.197102] Workqueue: events_unbound async_run_entry_fn
      [   24.197105]  ffffc900003c7688 ffffffff81435b35 ffffc900003c76d8 0000000000000000
      [   24.197107]  ffffc900003c76c8 ffffffff8107e4d6 000006fe5dc36f28 ffff88025dc30054
      [   24.197109]  ffff88025dc36f28 ffff88025dc30000 ffff88025dc30000 0000000000000015
      [   24.197110] Call Trace:
      [   24.197113]  [<ffffffff81435b35>] dump_stack+0x67/0x92
      [   24.197116]  [<ffffffff8107e4d6>] __warn+0xc6/0xe0
      [   24.197118]  [<ffffffff8107e53a>] warn_slowpath_fmt+0x4a/0x50
      [   24.197149]  [<ffffffffa039b4b4>] intel_display_power_put+0x134/0x140 [i915]
      [   24.197187]  [<ffffffffa04217dd>] intel_disable_ddi+0x4d/0x80 [i915]
      [   24.197223]  [<ffffffffa03f388f>] intel_encoders_disable.isra.74+0x7f/0x90 [i915]
      [   24.197257]  [<ffffffffa03f6c05>] haswell_crtc_disable+0x55/0x170 [i915]
      [   24.197292]  [<ffffffffa03fec88>] intel_atomic_commit_tail+0x108/0xfd0 [i915]
      [   24.197295]  [<ffffffff810d47c6>] ? __lock_is_held+0x66/0x90
      [   24.197330]  [<ffffffffa03fff79>] intel_atomic_commit+0x429/0x560 [i915]
      [   24.197332]  [<ffffffff81570186>] ?drm_atomic_add_affected_connectors+0x56/0xf0
      [   24.197334]  [<ffffffff8156f726>] drm_atomic_commit+0x46/0x50
      [   24.197336]  [<ffffffff81553f87>] restore_fbdev_mode+0x147/0x270
      [   24.197337]  [<ffffffff81555bee>] drm_fb_helper_restore_fbdev_mode_unlocked+0x2e/0x70
      [   24.197339]  [<ffffffff81555aa8>] drm_fb_helper_set_par+0x28/0x50
      [   24.197374]  [<ffffffffa041c7d3>] intel_fbdev_set_par+0x13/0x70 [i915]
      [   24.197376]  [<ffffffff8149e07a>] fbcon_init+0x57a/0x600
      [   24.197379]  [<ffffffff81514b71>] visual_init+0xd1/0x130
      [   24.197381]  [<ffffffff8151603c>] do_bind_con_driver+0x1bc/0x3a0
      [   24.197384]  [<ffffffff81516521>] do_take_over_console+0x111/0x180
      [   24.197386]  [<ffffffff8149e152>] do_fbcon_takeover+0x52/0xb0
      [   24.197387]  [<ffffffff814a12c3>] fbcon_event_notify+0x723/0x850
      [   24.197390]  [<ffffffff810a4830>] ?__blocking_notifier_call_chain+0x30/0x70
      [   24.197392]  [<ffffffff810a44a4>] notifier_call_chain+0x34/0xa0
      [   24.197394]  [<ffffffff810a4848>] __blocking_notifier_call_chain+0x48/0x70
      [   24.197397]  [<ffffffff810a4881>] blocking_notifier_call_chain+0x11/0x20
      [   24.197398]  [<ffffffff814a4556>] fb_notifier_call_chain+0x16/0x20
      [   24.197400]  [<ffffffff814a678c>] register_framebuffer+0x24c/0x330
      [   24.197402]  [<ffffffff815558d9>] drm_fb_helper_initial_config+0x219/0x3c0
      [   24.197436]  [<ffffffffa041d373>] intel_fbdev_initial_config+0x13/0x30 [i915]
      [   24.197438]  [<ffffffff810a5d44>] async_run_entry_fn+0x34/0x140
      [   24.197440]  [<ffffffff8109c26c>] process_one_work+0x1ec/0x6b0
      [   24.197442]  [<ffffffff8109c1e6>] ? process_one_work+0x166/0x6b0
      [   24.197445]  [<ffffffff8109c779>] worker_thread+0x49/0x490
      [   24.197447]  [<ffffffff8109c730>] ? process_one_work+0x6b0/0x6b0
      [   24.197448]  [<ffffffff810a2a9b>] kthread+0xeb/0x110
      [   24.197451]  [<ffffffff810a29b0>] ? kthread_park+0x60/0x60
      [   24.197453]  [<ffffffff818241a7>] ret_from_fork+0x27/0x40
      [   24.197476] ---[ end trace bda64b683b8e8162 ]---
      Signed-off-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1481812185-19098-3-git-send-email-maarten.lankhorst@linux.intel.comReviewed-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      37255d8d
    • Maarten Lankhorst's avatar
      drm/i915: Disable all crtcs during driver unload, v2. · a667fb40
      Maarten Lankhorst authored
      We may keep the crtc's enabled when userspace unsets all framebuffers but
      keeps the crtc active. This exposes a WARN in fbc_global disable, and
      a lot of bugs in our hardware readout code. Solve this by disabling
      all crtc's for now.
      
      Changes since v1:
      - Use lock_all_ctx instead of lock_all.
      Signed-off-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1481812185-19098-4-git-send-email-maarten.lankhorst@linux.intel.comReviewed-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
      a667fb40
    • Chris Wilson's avatar
      drm/i915/execlists: Add interrupt-pending check to intel_execlists_idle() · 453cfe21
      Chris Wilson authored
      Primarily this serves as a sanity check that the bit has been cleared
      before we suspend (and hasn't reappeared after resume).
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Cc: Mika Kuoppala <mika.kuoppala@intel.com>
      Cc: Tvrtko Ursulin <tursulin@ursulin.net>
      Link: http://patchwork.freedesktop.org/patch/msgid/20170201131222.11882-1-chris@chris-wilson.co.ukReviewed-by: default avatarMika Kuoppala <mika.kuoppala@intel.com>
      453cfe21
    • Chris Wilson's avatar
      drm/i915/execlists: Skip resetting RING_CONTEXT_STATUS_PTR · e2de845e
      Chris Wilson authored
      As we now flag when the GPU signals a context-switch and do not read the
      status register before we see that signal, we do not have to ensure that
      it is cleared upon reset (and can leave it to the GPU to reset it from
      the power context).
      Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
      Cc: Mika Kuoppala <mika.kuoppala@intel.com>
      Cc: Tvrtko Ursulin <tursulin@ursulin.net>
      Link: http://patchwork.freedesktop.org/patch/msgid/20170201125338.12932-1-chris@chris-wilson.co.ukReviewed-by: default avatarMika Kuoppala <mika.kuoppala@intel.com>
      e2de845e
    • Uma Shankar's avatar
      drm/i915: Add MIPI_IO WA and program DSI regulators · 1881a423
      Uma Shankar authored
      Enable MIPI IO WA for BXT DSI as per bspec and
      program the DSI regulators.
      
      v2: Moved IO enable to pre-enable as per Mika's
      review comments. Also reused the existing register
      definition for BXT_P_CR_GT_DISP_PWRON.
      
      v3: Added Programming the DSI regulators as per disable/enable
      sequences.
      
      v4: Restricting regulator changes to BXT as suggested by
      Jani/Mika
      
      v5: Removed redundant read/modify for regulator register as
      per Jani's comment. Maintain enable/disable symmetry as per spec.
      Signed-off-by: default avatarUma Shankar <uma.shankar@intel.com>
      Signed-off-by: default avatarVidya Srinivas <vidya.srinivas@intel.com>
      Acked-by: default avatarMika Kahola <mika.kahola@intel.com>
      Reviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
      Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1485353603-11260-1-git-send-email-vidya.srinivas@intel.com
      1881a423