- 27 Jan, 2012 10 commits
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Bruce Allan authored
The generic lib.c file contains code relative to the various MACs, NVM and Manageability supported by the driver. This patch splits the file into three which are specific to those areas similar to how the PHY-specific code is in phy.c and code specific to the 80003es2lan, 8257x, and ichX MAC families are in their own files. The generic code that is applicable to all MAC/PHY parts supported by the driver remains in netdev.c, param.c and ethtool.c files. No change in functionality, just moving code around for ease of maintenance, with some whitespace and other checkpatch cleanups. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Bruce Allan authored
__er16flash() is not meant to be called directly. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Bruce Allan authored
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Bruce Allan authored
Convert the last instances of strncpy() to the preferred strlcpy(). Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Bruce Allan authored
To ease searching for debug message strings, concatenate strings that span multiple lines even if the resulting line exceeds 80 columns; these will not cause checkpatch warnings. Also, add '\n' and remove unnecessary '\r' from a few debug strings. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Bruce Allan authored
When setting the Low Power Link Up (LPLU, a.k.a. reverse auto-negotiation) on 82577/8278/82579, do not restart auto-negotiation if reset of the Phy is blocked by the Manageability Engine. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Bruce Allan authored
During bi-directional stress on some 82566/82567 devices, some received packets were dropped. Increasing the Receive Packet Buffer Allocation resolves this. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Bruce Allan authored
When going to Sx with an ICHx/PCH device, the default Low Power Link Up (LPLU, a.k.a. reverse auto-negotiation) behavior should be whatever is set in the NVM. However, the function e1000_suspend_workarounds_ich8lan() called when going to Sx always enabled LPLU in all power states. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Bruce Allan authored
The workaround which toggles the LANPHYPC (LAN PHY Power Control) value bit to force the MAC-Phy interconnect into PCIe mode from SMBus mode during driver load and resume should always be done except if PHY resets are blocked by the Manageability Engine (ME). Previously, the toggle was done only if PHY resets are blocked and the ME was disabled. The rest of the patch is just indentation changes as a consequence of the updated workaround. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Bruce Allan authored
Internal stress testing with jumbo frames shows the reliability of ICH9 and ICH10D devices is improved in certain corner cases by disabling the Early Receive feature. To reduce the performance impact caused by disabling this feature, the packet buffer sizes and relevant flow control settings are modified accordingly. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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- 26 Jan, 2012 30 commits
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David S. Miller authored
Suggested by YOSHIFUJI Hideaki. Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Otherwise (on sparc64): drivers/net/ethernet/intel/e1000e/ethtool.c:657:3: error: implicit declaration of function 'vmalloc' [-Werror=implicit-function-declaration] Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
The only semantic difference is that we now hold a reference to the neighbour and thus have to release it. Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
In the future the ipv4/ipv6 route gateway will take on two types of values: 1) INADDR_ANY/IN6ADDR_ANY, for local network routes, and in this case the neighbour must be obtained using the destination address in ipv4/ipv6 header as the lookup key. 2) Everything else, the actual nexthop route address. So if the gateway is not inaddr-any we use it, otherwise we must use the packet's destination address. Signed-off-by: David S. Miller <davem@davemloft.net>
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Eric Dumazet authored
It might be useful to get a counter of failed tcp_retransmit_skb() calls. Reported-by: Satoru Moriya <satoru.moriya@hds.com> Signed-off-by: Eric Dumazet <eric.dumazet@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Eric Dumazet authored
Allocation of 64 bytes in skb headroom is not enough if we have to pull ethernet + ipv6 + tcp headers, and/or extra tunneling header. Its currently not noticed because netdev_alloc_skb_ip_align(64) give us more room, thanks to power-of-two kmalloc() roundups. Make sure we ask for 128 bytes so that side effects of upcoming patches from Ian Campbell dont decrease benet rx performance, because of extra skb head reallocations. Signed-off-by: Eric Dumazet <eric.dumazet@gmail.com> Cc: Ian Campbell <Ian.Campbell@citrix.com> Cc: Vasundhara Volam <vasundhara.volam@emulex.com> Cc: Sathya Perla <sathya.perla@emulex.com> Cc: Ajit Khaparde <ajit.khaparde@emulex.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Ariel Elior authored
Signed-off-by: Ariel Elior <ariele@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Ariel Elior authored
Add statistics for tracking parity errors from which we successfully recovered and those which were deemed unrecoverable. Signed-off-by: Ariel Elior <ariele@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Ariel Elior authored
1. Sample mcp pulse and mcp sequence in nic load instead of in init_one as they may change by the time we want to use them. 2. Allow cnic to access device during nic load (by adding a new "LOADING" state to recovery flow). This prevents the unnecessary cnic timeout which resulted by cnic attempting to access because nic is loading, but being blocked because of the Recovery state. 3. Issue 'fake' driver load command to mcp when last driver unloads to prevent mcp from taking ownership. When recovery is complete unload fake driver to allow mcp to initialize the hardware before first driver loads. Signed-off-by: Ariel Elior <ariele@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Ariel Elior authored
The recovery register (to which a hardware lock has been added in previous patch) is used amongst other things to track the active PFs. The old implementation which used a per path counter is not viable in a virtualized environment where a pf may increment the counter and then have the kernel crash around it preventing the counter from ever reaching zero. In the new implementation the scenario described will result in the PF timing out against the mcp, which will clear the PF's bit in the bitmask allowing recovery process to proceed. Signed-off-by: Ariel Elior <ariele@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Ariel Elior authored
Use hardware locks to protect resources common to several Physical Functions. In a virtualized environment the RTNL lock only protects a PF's driver against the PFs sharing it's VMs with regard to device resources. Other PFs may reside in other VMs under other OSs, and are not subject to the lock. Such resources which were previously protected implicitly by the RTNL lock must now be protected explicitly with dedicated HW locks. Signed-off-by: Ariel Elior <ariele@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Ariel Elior authored
In a virtualized environment it is possible for a loading driver to discover that Firmware is already loaded to the device, and that this FW does not match its own. This can happen for example if different Physical Functions are Assigned to different VMs in which different driver versions are loaded. The code in this patch ensures that only drivers with matching FW are loaded over the device, and that in the case described above where the Firmware version doesn't match the driver load is aborted. Signed-off-by: Ariel Elior <ariele@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Ariel Elior authored
1. Fix bug where return value is ignored 2. Improve printouts 3. Fix typos Signed-off-by: Ariel Elior <ariele@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Ariel Elior authored
BDF was obtained from kernel but since in virtualized environment (e.g. physical device assigment in KVM) the function number may not be the real one, the info must be obtained from the device. Signed-off-by: Ariel Elior <ariele@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Ariel Elior authored
In virtualized environments indirect access to the device may not be supported (depending on the Hypervisor type). Indirect device access was used since in some harware contexts (i.e. certain chipset and BIOS) every access the driver makes across the pci is followed by a BIOS initiated Zero Length Read to the same address. When accessing widebus registers this zero length read corrupts the serialization of the read/write sequence resulting with errors. To avoid this problem widebus registers are always accessed via the DMAE or the indirect interface. However, the 57712x and 578xx devices intercept the zero length read and so using the indirect interface with these devices is not necessary. Since PDA is only supported for 57712x and 578xx the indirect access to device was restricted to 57710 and 57711x. Signed-off-by: Ariel Elior <ariele@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Ariel Elior authored
Enable the use of up to three hardware queues for transmission. The queues are always dequed round robin (i.e. strict priority, PFC and ETS are not supported). This does allow the allocation of a seperate HW queue for low volume, high priority traffic which will be serviced more promptly. Signed-off-by: Ariel Elior <ariele@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Bruce Allan authored
On 82574/82583, there is a hardware bug which might cause a Tx hang when the internal buffer is full. Setting this bit enables a hardware fix to work around the issue. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Bruce Allan authored
This code snippet is simply writing default values to the register which is unnecessary since the values are programmed into the register by default. There is a special case for 80003es2lan needing the Retransmit on Late Collision bit set but that is also done in e1000_init_hw_80003es2lan(). Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Bruce Allan authored
Use the default hardware values for TIPG except for 80003es2lan(*). The code that is removed in this patch is either unnecessarily writing the TIPG register with the hardware default values for some devices (82571/2/3/4) or writing the wrong value for others (ICH/PCH LOMs). The only change in functionality is setting the correct default TIPG for the latter devices. (*) The correct value for 80003es2lan is already set properly in e1000_init_hw_80003es2lan() and e1000_cfg_kmrn_{10_100|1000}_80003es2lan(), and the unused flag FLAG_TIPG_MEDIUM_FOR_80003ESLAN is removed. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Bruce Allan authored
When connected to certain switches, the 82579 PHY might drop link unexpectedly. Work around the issue by setting the Mean Square Error higher than the hardware default. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Bruce Allan authored
The hardware erratum workaround where the TXDCTL register must be the same setting for both queues should always be done. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Bruce Allan authored
Based on a patch from Prabhakar Kushwaha <prabhakar@freescale.com>, set appropriate default interrupt mode dependent on whether CONFIG_PCI_MSI is enabled in the kernel configuration and if the hardware supports MSI-X. Set the module parameter log message accordingly. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Cc: Jin Qing <b24347@freescale.com> Cc: Prabhakar Kushwaha <prabhakar@freescale.com> Cc: Jin Qing <b24347@freescale.com> Cc: Kumar Gala <galak@kernel.crashing.org> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Bruce Allan authored
Make it more like how igb does it, with some additional error checking. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Bruce Allan authored
For ring-specific functions, pass a pointer to the ring struct instead of a pointer to the adapter struct. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Bruce Allan authored
The Tx/Rx head and tail registers and itr_register are always at known addresses based on the __iomem address at which the PCI region (from BAR 0) is mapped and known offsets within the region for each of these registers. Store and use the full address rather than just the region offset to reduce unnecessary address calculations. Also, change current u8 __iomem pointers to void __iomem pointers. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Bruce Allan authored
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Bruce Allan authored
Enable RPS by default. Disallow jumbo frames when both receive checksum and receive hashing are enabled because the hardware cannot do both IP payload checksum (enabled when receive checksum is enabled when using packet split which is used for jumbo frames) and provide RSS hash at the same time. v2: added ethtool command to query flow hashing behavior per Ben Hutchings and changed the type of rsskey to cleanup the setting of the register array and avoid unnecessary casts (as pointed out by Joe Perches). The long error messages are not changed since there is nothing in the kernel ./Documentation that suggests the preferred method for dealing with long messages other than to never break strings; leaving them as-is for now. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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Bruce Allan authored
1) cleanup whitespace in e1000_rx_checksum() function header comment 2) do not check hardware checksum when Rx checksum is disabled 3) reduce duplicated calls to le16_to_cpu() by just using it within e1000_rx_checksum() instead of in each call to the function v2: use swab16 instead of le16_to_cpu & htons and corrected type for the passed-in csum Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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David Miller authored
Now we must provide the IP destination address, and a reference has to be dropped when we're done with the entry. Signed-off-by: David S. Miller <davem@davemloft.net>
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David Miller authored
Now we must provide the IP destination address, and a reference has to be dropped when we're done with the entry. Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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