1. 20 Nov, 2019 8 commits
  2. 18 Nov, 2019 2 commits
  3. 15 Nov, 2019 12 commits
  4. 14 Nov, 2019 9 commits
  5. 13 Nov, 2019 9 commits
    • Ulf Hansson's avatar
      MAINTAINERS: Mark vub300 mmc driver as orphan · 6bb41b70
      Ulf Hansson authored
      Tony's email address from elandigitalsystems.com has bounced for a long
      time. Let's update MAINTAINERS to mark the driver as orphan as to reflect
      the situation.
      Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
      6bb41b70
    • Ulf Hansson's avatar
      mmc: vub300: Drop redundant host ops ->init_card() · c11113d5
      Ulf Hansson authored
      The ->init_card() host ops is printing message to the log, without actually
      doing something useful. Let's just drop this code.
      Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
      c11113d5
    • Biju Das's avatar
      mmc: renesas_sdhi_internal_dmac: Add r8a774b1 support · c9af138c
      Biju Das authored
      This patch adds SDHI support for RZ/G2N (R8A774B1) SoC.
      Signed-off-by: default avatarBiju Das <biju.das@bp.renesas.com>
      Reviewed-by: default avatarWolfram Sang <wsa+renesas@sang-engineering.com>
      Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
      c9af138c
    • Chaotian Jing's avatar
      mmc: block: Add CMD13 polling for MMC IOCTLS with R1B response · a0d4c7eb
      Chaotian Jing authored
      MMC IOCTLS with R1B responses may cause the card to enter the busy state,
      which means it's not ready to receive a new request. To prevent new
      requests from being sent to the card, use a CMD13 polling loop to verify
      that the card returns to the transfer state, before completing the request.
      Signed-off-by: default avatarChaotian Jing <chaotian.jing@mediatek.com>
      Reviewed-by: default avatarAvri Altman <avri.altman@wdc.com>
      Cc: stable@vger.kernel.org
      Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
      a0d4c7eb
    • Chaotian Jing's avatar
      mmc: block: Make card_busy_detect() a bit more generic · 3869468e
      Chaotian Jing authored
      To prepare for more users of card_busy_detect(), let's drop the struct
      request * as an in-parameter and convert to log the error message via
      dev_err() instead of pr_err().
      Signed-off-by: default avatarChaotian Jing <chaotian.jing@mediatek.com>
      Reviewed-by: default avatarAvri Altman <avri.altman@wdc.com>
      Cc: stable@vger.kernel.org
      Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
      3869468e
    • Yangbo Lu's avatar
      mmc: sdhci-of-esdhc: fix up erratum A-008171 workaround · 22dc132d
      Yangbo Lu authored
      A previous patch implemented an incomplete workaround of erratum
      A-008171. The complete workaround is as below. This patch is to
      implement the complete workaround which uses SW tuning if HW tuning
      fails, and retries both HW/SW tuning once with reduced clock if
      workaround fails. This is suggested by hardware team, and the patch
      had been verified on LS1046A eSDHC + Phison 32G eMMC which could
      trigger the erratum.
      
      Workaround:
      /* For T1040, T2080, LS1021A, T1023 Rev 1: */
      1. Program TBPTR[TB_WNDW_END_PTR] = 3*DIV_RATIO.
      2. Program TBPTR[TB_WNDW_START_PTR] = 5*DIV_RATIO.
      3. Program the software tuning mode by setting TBCTL[TB_MODE] = 2'h3.
      4. Set SYSCTL2[EXTN] and SYSCTL2[SAMPCLKSEL].
      5. Issue SEND_TUNING_BLK Command (CMD19 for SD, CMD21 for MMC).
      6. Wait for IRQSTAT[BRR], buffer read ready, to be set.
      7. Clear IRQSTAT[BRR].
      8. Check SYSCTL2[EXTN] to be cleared.
      9. Check SYSCTL2[SAMPCLKSEL], Sampling Clock Select. It's set value
         indicate tuning procedure success, and clear indicate failure.
         In case of tuning failure, fixed sampling scheme could be used by
         clearing TBCTL[TB_EN].
      /* For LS1080A Rev 1, LS2088A Rev 1.0, LA1575A Rev 1.0: */
      1. Read the TBCTL[31:0] register. Write TBCTL[11:8]=4'h8 and wait for
         1ms.
      2. Read the TBCTL[31:0] register and rewrite again. Wait for 1ms second.
      3. Read the TBSTAT[31:0] register twice.
      3.1 Reset data lines by setting ESDHCCTL[RSTD] bit.
      3.2 Check ESDHCCTL[RSTD] bit.
      3.3 If ESDHCCTL[RSTD] is 0, go to step 3.4 else go to step 3.2.
      3.4 Write 32'hFFFF_FFFF to IRQSTAT register.
      4. if TBSTAT[15:8]-TBSTAT[7:0] > 4*DIV_RATIO or TBSTAT[7:0]-TBSTAT[15:8]
         > 4*DIV_RATIO , then program TBPTR[TB_WNDW_END_PTR] = 4*DIV_RATIO and
         program TBPTR[TB_WNDW_START_PTR] = 8*DIV_RATIO.
      /* For LS1012A Rev1, LS1043A Rev 1.x, LS1046A 1.0: */
      1. Read the TBCTL[0:31] register. Write TBCTL[20:23]=4'h8 and wait for
         1ms.
      2. Read the TBCTL[0:31] register and rewrite again. Wait for 1ms second.
      3. Read the TBSTAT[0:31] register twice.
      3.1 Reset data lines by setting ESDHCCTL[RSTD] bit.
      3.2 Check ESDHCCTL[RSTD] bit.
      3.3 If ESDHCCTL[RSTD] is 0, go to step 3.4 else go to step 3.2.
      3.4 Write 32'hFFFF_FFFF to IRQSTAT register.
      4. if TBSTAT[16:23]-TBSTAT[24:31] > 4*DIV_RATIO or TBSTAT[24:31]-
         TBSTAT[16:23] > 4* DIV_RATIO , then program TBPTR[TB_WNDW_END_PTR] =
         4*DIV_RATIO and program TBPTR[TB_WNDW_START_PTR] = 8*DIV_RATIO.
      /* For LS1080A Rev 1, LS2088A Rev 1.0, LA1575A Rev 1.0 LS1012A Rev1,
       * LS1043A Rev 1.x, LS1046A 1.0:
       */
      5. else program TBPTR[TB_WNDW_END_PTR] = 3*DIV_RATIO and program
         TBPTR[TB_WNDW_START_PTR] = 5*DIV_RATIO.
      6. Program the software tuning mode by setting TBCTL[TB_MODE] = 2'h3.
      7. Set SYSCTL2[EXTN], wait 1us and SYSCTL2[SAMPCLKSEL].
      8. Issue SEND_TUNING_BLK Command (CMD19 for SD, CMD21 for MMC).
      9. Wait for IRQSTAT[BRR], buffer read ready, to be set.
      10. Clear IRQSTAT[BRR].
      11. Check SYSCTL2[EXTN] to be cleared.
      12. Check SYSCTL2[SAMPCLKSEL], Sampling Clock Select. It's set value
          indicate tuning procedure success, and clear indicate failure.
          In case of tuning failure, fixed sampling scheme could be used by
          clearing TBCTL[TB_EN].
      
      Fixes: b1f378ab ("mmc: sdhci-of-esdhc: add erratum A008171 support")
      Signed-off-by: default avatarYinbo Zhu <yinbo.zhu@nxp.com>
      Signed-off-by: default avatarYangbo Lu <yangbo.lu@nxp.com>
      Acked-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
      Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
      22dc132d
    • Yangbo Lu's avatar
      mmc: sdhci-of-esdhc: poll ESDHC_FLUSH_ASYNC_FIFO bit until completion · 6e32f65c
      Yangbo Lu authored
      The ESDHC_FLUSH_ASYNC_FIFO bit which is set to flush asynchronous FIFO
      should be polled until it's auto cleared by hardware.
      Signed-off-by: default avatarYangbo Lu <yangbo.lu@nxp.com>
      Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
      6e32f65c
    • Nicolas Ferre's avatar
      mmc: sdhci-of-at91: add DT property to enable calibration on full reset · 727d836a
      Nicolas Ferre authored
      Add a property to keep the analog calibration cell powered.
      This feature is specific to the Microchip SDHCI IP and outside
      of the standard SDHCI register map.
      
      By always keeping it on, after a full reset sequence, we make sure
      that this feature is activated and not disabled.
      
      We expose a hardware property to the DT as this feature can be used
      to adapt SDHCI behavior vs. how the SDCAL SoC pin is connected
      on the board.
      
      Note that managing properly this property would reduce
      power consumption on some SAMA5D2 SiP revisions.
      Signed-off-by: default avatarNicolas Ferre <nicolas.ferre@microchip.com>
      Acked-by: default avatarLudovic Desroches <ludovic.desroches@microchip.com>
      Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
      727d836a
    • Nicolas Ferre's avatar
      dt-bindings: sdhci-of-at91: add the microchip,sdcal-inverted property · 5cd41fe8
      Nicolas Ferre authored
      Add the specific microchip,sdcal-inverted property to at91 sdhci
      device binding.
      This optional property describes how the SoC SDCAL pin is connected.
      It could be handled at SiP, SoM or board level.
      
      This property read by at91 sdhci driver will allow to put in place a
      software workaround that would reduce power consumption.
      Signed-off-by: default avatarNicolas Ferre <nicolas.ferre@microchip.com>
      Reviewed-by: default avatarRob Herring <robh@kernel.org>
      Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
      5cd41fe8