nvme-pci: limit max_hw_sectors based on the DMA max mapping size
Christoph Hellwig authored

When running a NVMe device that is attached to a addressing
challenged PCIe root port that requires bounce buffering, our
request sizes can easily overflow the swiotlb bounce buffer
size.  Limit the maximum I/O size to the limit exposed by
the DMA mapping subsystem.
Signed-off-by: default avatarChristoph Hellwig <hch@lst.de>
Reported-by: default avatarAtish Patra <Atish.Patra@wdc.com>
Tested-by: default avatarAtish Patra <Atish.Patra@wdc.com>
Reviewed-by: default avatarSagi Grimberg <sagi@grimberg.me>
7637de31
Linux kernel
============

There are several guides for kernel developers and users. These guides can
be rendered in a number of formats, like HTML and PDF. Please read
Documentation/admin-guide/README.rst first.

In order to build the documentation, use ``make htmldocs`` or
``make pdfdocs``.  The formatted documentation can also be read online at:

    https://www.kernel.org/doc/html/latest/

There are various text files in the Documentation/ subdirectory,
several of them using the Restructured Text markup notation.

Please read the Documentation/process/changes.rst file, as it contains the
requirements for building and running the kernel, and information about
the problems which may result by upgrading your kernel.