-
Krzysztof Kozlowski authored
The pinctrl drive strength register on exynos4415 is 2-bit wide for each pin. The pins for SD2 were configured with value of 4. The driver does not validate the value so this overflow effectively set a bit 1 in adjacent pins thus configuring them to drive strength 2x. The author's intention was probably to set drive strength of 4x. All other SD pins are configured with drive strength of 4x. Fix these with same pattern. Fixes: 9246e7ff ("ARM: dts: Add dts files for exynos4415 SoC") Signed-off-by:
Krzysztof Kozlowski <k.kozlowski@samsung.com> Reviewed-by:
Javier Martinez Canillas <javier@osg.samsung.com> Reviewed-by:
Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Acked-by:
Linus Walleij <linus.walleij@linaro.org>
5e49773f