• Mike Turquette's avatar
    ARM: OMAP4: clock: round_rate and recalc functions for DPLL_ABE · a1900f2e
    Mike Turquette authored
    OMAP4 DPLL_ABE can enable a 4X multipler on top of the normal MN multipler
    and divider. This is achieved by setting CM_CLKMODE_DPLL_ABE.DPLL_REGM4XEN
    bit in CKGEN module of CM1. From the OMAP4 TRM:
    
    Fdpll = Fref x 2 x (4 x M/(N+1)) in case REGM4XEN bit field is set (only
    applicable to DPLL_ABE).
    
    Add new round_rate() and recalc() functions for OMAP4, that check the
    setting of REGM4XEN bit and handle this appropriately. The new functions
    are a simple wrapper on top of the existing omap2_dpll_round_rate() and
    omap2_dpll_get_rate() functions to handle the REGM4XEN bit.
    
    The REGM4XEN bit is only implemented for the ABE DPLL on OMAP4 and so
    only dpll_abe_ck uses omap4_dpll_regm4xen_round_rate() and
    omap4_dpll_regm4xen_recalc() functions.
    Signed-off-by: default avatarMike Turquette <mturquette@ti.com>
    Tested-by: default avatarJon Hunter <jon-hunter@ti.com>
    Signed-off-by: default avatarJon Hunter <jon-hunter@ti.com>
    [paul@pwsan.com: fixed attempt to return a negative from a fn returning
    		 unsigned; pass along errors from omap2_dpll_round_rate();
    		 added documentation; added Jon's S-o-b]
    Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
    a1900f2e
clock44xx.h 517 Bytes