• Balbir Singh's avatar
    powerpc/xmon: Apply binutils changes to upgrade disassembly · 08d96e0b
    Balbir Singh authored
    The following commit-ids from the binutils project were applied on the
    xmon branch and relicensed with the permission of the authors under
    GPLv2 for the following files:
    
      ppc-opc.c
      ppc-dis.c
      ppc.h
    
    Working off of binutils commit 65b650b4c746 we have now moved up to
    binutils commit a5721ba270dd.
    
    Some commit logs have been taken verbatim, some are summarized for ease
    of understanding.
    
    Here is a summary of the commits:
    
     33e8d5ac613d PPC7450 New.  (powerpc_opcodes): Use it in dcba.
     c3d65c1ced61 New opcodes and mask
     8dbcd839b1bb Instruction Sorting
     91eb7075e370 (powerpc_opcodes): Fix the first two operands of dquaiq.
     548b1dcfcbab ppc-opc.c (powerpc_opcodes): Remove the dcffix and dcffix.
     930bb4cfae30 Support optional L form mtmsr.
     de866fccd87d (powerpc_opcodes): Order and format.
     19a6653ce8c6 ppc e500mc support
     fa452fa6833c (ppc_cpu_t): New typedef.
     c8187e1509b2 (parse_cpu): Handle -m464.
     081ba1b3c08b Define. (PPC_OPERAND_FSL, PPC_OPERAND_FCR, PPC_OPERAND_UDI)
     9b4e57660d38 Rename altivec_or_spe to retain_flags. Handle -mvsx and -mpower7.
     899d85beadd0 (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
     e1c93c699b7d (extract_sprg): Correct operand range check.
     2f3bb96af796 (powerpc_init_dialect): Do not set PPC_OPCODE_BOOKE
     1cb0a7674666 (ppc_setup_opcodes): Remove PPC_OPCODE_NOPOWER4 test
     21169fcfadfa (print_insn_powerpc): Skip insn if it is deprecated
     80890a619b85 ("dcbt", "dcbtst")
     0e55be1624c2 ("lfdepx", "stfdepx")
     066be9f7bd8e (parse_cpu): Extend -mpower7 to accept power7 and isel instructions.
     c72ab5f2c55d (powerpc_opcodes): Reorder the opcode table so that instructions
     69fe9ce501f5 (ppc_parse_cpu): New function. 	(powerpc_init_dialect)
     e401b04ca7cd (powerpc_opcodes) <"dcbzl">: Merge the POWER4 and E500MC entries.
     70dc4e324b9a (powerpc_init_dialect): Do not choose a default dialect due to -many/-Many.
     858d7a6db20b (powerpc_opcodes) <"tlbilxlpid", "tlbilxpid", "tlbilxva", "tlbilx"
     bdc7fcfe59f1 (powerpc_macros <extrdi>): Allow n+b of 64
     e0d602ecffb0 (md_show_usage): Document -mpcca2
     b961e85b6ebe (ppc_cpu_t): Typedef to uint64_t
     8765b5569284 (powerpc_opcodes): Remove support for the the "lxsdux", "lxvd2ux"
     634b50f2a623 Rename "ppca2" to "a2"
     9fe54b1ca1c0 (md_show_usage): Document -m476
     0dc9305793c8 Add bfd_mach_ppc_e500mc64
     ce3d2015b21b Define. bfd/ 	* archures.c (bfd_mach_ppc_titan)
     cdc51b0748c4 Add -mpwr4, -mpwr5, -mpwr5x, -mpwr6 and -mpwr7
     63d0fa4e9e57 Add PPC_OPCODE_E500MC for "e500mc64"
     cee62821d472 New Define. ("dccci"): Enable for PPCA2
     85d4ac0b3c0b Correct wclr encoding.
     51b5d4a8c5e5 (powerpc_opcodes): Enable divdeu, devweu, divde, divwe, divdeuo
     e01d869a3be2 (md_assemble): Emit APUinfo section for PPC_OPCODE_E500
     09a8ad8d8f56 (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf and mtocrf on EFS.
     f2bae120dcef (PPC_OPCODE_COMMON): Expand comment.
     81a0b7e2ae09 (PPCPWR2): Add PPC_OPCODE_COMMON. (powerpc_opcodes): Add "subc"
     bdc70b4a03fd (PPC_OPCODE_32, PPC_OPCODE_BOOKE64, PPC_OPCODE_CLASSIC)
     7102e95e4943 (ppc_set_cpu): Cast PPC_OPCODE_xxx to ppc_cpu_t before inverting
     f383de6633cb (powerpc_opcodes) [lswx,lswi,stswx,stswi]: Deprecate on E500 and E500MC
     6b069ee70de3 Remove PPC_OPCODE_PPCPS
     2f7f77101279 (powerpc_opcodes): Enable icswx for POWER7
     989993d80a97 (insert_nbi, insert_rbx, FRAp, FRBp, FRSp, FRTp, NBI, RAX, RBX)
     a08fc94222d1 <drrndq, drrndq., dtstexq, dctqpq, dctqpq., dctfixq, dctfixq.
     8ebac3aae962 (ISA_V2): Define and use for relevant BO field tests
     aea77599d0db Add PPC_OPCODE_ALTIVEC2, PPC_OPCODE_E6500, PPC_OPCODE_TMR
     b240011aba98 (disassemble_init_for_target): Handle ppc init.
     d668828207c2 (powerpc_opcd_indices): Bump array size
     b9c361e0ad33 Add support for PowerPC VLE.
     e1dad58d73dc (has_tls_reloc, has_tls_get_addr_call, has_vle_insns, is_ppc_vle)
     df7b86aa4cb6 Add check that sysdep.h has been included before
     98c76446ea6b (extract_sprg): Use ALLOW8_SPRG to include VLE.
     a4ebc835cbcb (powerpc_macros): Add entries for e_extlwi to e_clrlslwi
     94caa966375d (has_vle_insns, is_ppc_vle): Delete
     c7a8dbf91f37 Change RA to RA0
     d908c8af5a1d Add necessary casts for printing integer values
     03edbe3bfb93 Add/remove PPCVLE for some 32-bit insns
     9f6a6cc022e1 <xnop, yield, mdoio, mdoom>: New extended mnemonics
     588925d06545 <RSQ, RTQ>: Use PPC_OPERAND_GPR
     8baf7b78b5d9 <"lswx">: Use RAX for the second and RBX for the third operand
     e67ed0e885d6 Changed opcode for vabsdub, vabsduh, vabsduw, mviwsplt
     fb048c26f19f (UIMM4, UIMM3, UIMM2, VXVA_MASK, VXVB_MASK, VXVAVB_MASK, VXVDVA_MASK
     382c72e90441 (VXASHB_MASK): New define
     c7a5aa9c64fc (ppc_opts) <altivec>: Use PPC_OPCODE_ALTIVEC2
     ab4437c3224f <vcfpsxws>: Fix opcode spelling
     62082a42b9cd "lfdp" and "stfdp" use DS offset.
     776fc41826bb (ppc_parse_cpu): Update prototype
     943d398f4c52 (insert_sci8, extract_sci8): Rewrite.
     5817ffd1f81c New define (PPC_OPCODE_HTM/POWER8)
     9f0682fe89d9 (extract_vlesi): Properly sign extend
     c0637f3af686 (powerpc_init_dialect): Set default dialect to power8.
     58ae08f29af8 (powerpc_opcodes): Add tdui, twui, tdu, twu, tui, tu
     4f6ffcd38d90 (powerpc_init_dialect): Use ppc_parse_cpu() to set dialect
     4b95cf5c0c75 Update copyright years
     a47622ac1bad Allow both signed and unsigned fields in PowerPC cmpli insn
     12e87fac5c76 ppc: enable msgclr and msgsnd on Power8
     8514e4db84cc Don't deprecate powerpc mftb insn
     db76a70026ab Power4 should treat mftb as extended mfspr mnemonic
     b90efa5b79ac ChangeLog rotatation and copyright year update
     c4e676f19656 powerpc: Add slbfee. instruction
     27c49e9a8fc0 powerpc: Only initialise opcode indices once
     4fff86c517ab DCBT_EO): New define
     4bc0608a8b69 Fix some PPC assembler errors
     dc302c00611b Add hwsync extended mnemonic
     99a2c5612124 Remove unused MTMSRD_L macro and re-add accidentally deleted comment
     11a0cf2ec0ed Allow for optional operands with non-zero default values
     7b9341139a69 PPC sync instruction accepts invalid and incompatible operands
     ef5a96d564a2 Remove ppc860, ppc750cl, ppc7450 insns from common ppc
     43e65147c07b Remove trailing spaces in opcodes
     6dca4fd141fd Add dscr and ctrl SPR mnemonics
     b6518b387185 Fix compile time warnings generated when compiling with clang
     36f7a9411dcd Patches for illegal ppc 500 instructions
     a680de9a980e Add assembler, disassembler and linker support for power9
     dd2887fc3de4 Reorder some power9 insns
     b817670b52b7 Enable 2 operand form of powerpc mfcr with -many
     6f2750feaf28 Copyright update for binutils
     afa8d4054b8e Delete opcodes that have been removed from ISA 3.0
     1178da445ad5 Accept valid one byte signed and unsigned values for the IMM8 operand
     e43de63c8fd1 Fix powerpc subis range
     514e58b72633 Correct "Fix powerpc subis range"
     19dfcc89e8d9 Add support for new POWER ISA 3.0 instructions
     1fe0971e41a4 add more extern C
     026122a67044 Re-add support for lbarx, lharx, stbcx. and sthcx. insns back to the E6500 cpu
     14b57c7c6a53 PowerPC VLE
     6fd3a02da554 Add support for yet some more new ISA 3.0 instructions
     dfdaec14b0db Fix some PowerPC VLE BFD issues and add some PowerPC VLE instructions
     fd486b633e87 Modify POWER9 support to match final ISA 3.0 documentation
     a5721ba270dd Disallow 3-operand cmp[l][i] for ppc64
    
    This updates the disassembly capabilities to add support for newer
    processors.
    Signed-off-by: default avatarBalbir Singh <bsingharora@gmail.com>
    [mpe: Reformat commit list for brevity]
    Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
    08d96e0b
ppc-dis.c 23.3 KB