• Pavel Fedin's avatar
    arm64: KVM: Correctly handle zero register during MMIO · bc45a516
    Pavel Fedin authored
    On ARM64 register index of 31 corresponds to both zero register and SP.
    However, all memory access instructions, use ZR as transfer register. SP
    is used only as a base register in indirect memory addressing, or by
    register-register arithmetics, which cannot be trapped here.
    
    Correct emulation is achieved by introducing new register accessor
    functions, which can do special handling for reg_num == 31. These new
    accessors intentionally do not rely on old vcpu_reg() on ARM64, because
    it is to be removed. Since the affected code is shared by both ARM
    flavours, implementations of these accessors are also added to ARM32 code.
    
    This patch fixes setting MMIO register to a random value (actually SP)
    instead of zero by something like:
    
     *((volatile int *)reg) = 0;
    
    compilers tend to generate "str wzr, [xx]" here
    
    [Marc: Fixed 32bit splat]
    Signed-off-by: default avatarPavel Fedin <p.fedin@samsung.com>
    Reviewed-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
    Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
    bc45a516
mmio.c 4.96 KB