• Chris Wilson's avatar
    drm/i915: Flush pending interrupt following a GPU reset · 0f36a85c
    Chris Wilson authored
    After resetting the GPU (or subset of engines), call synchronize_irq()
    to flush any pending irq before proceeding with the cleanup. For a
    device level reset, we disable the interupts around the reset, but when
    resetting just one engine, we have to avoid such global disabling. This
    leaves us open to an interrupt arriving for the engine as we try to
    reset it. We already do try to flush the IIR following the reset, but we
    have to ensure that the in-flight interrupt does not land after we start
    cleaning up after the reset; enter synchronize_irq().
    
    As it current stands, we very rarely, but fatally, see sequences such as:
    
        2.... 57964564us : execlists_reset_prepare: rcs0
        2.... 57964613us : execlists_reset: rcs0 seqno=424
        0d.h1 57964615us : gen8_cs_irq_handler: rcs0 CS active=1
        2d..1 57964617us : __i915_request_unsubmit: rcs0 fence 29:1056 <- global_seqno 1060
        2.... 57964703us : execlists_reset_finish: rcs0
        0..s. 57964705us : execlists_submission_tasklet: rcs0 awake?=1, active=0, irq-posted?=1
    
    v2: Move the sync into the execlists reset handler so that we coordinate
    the flush with disabling the interrupt handling and canceling the
    pending interrupt.
    v3: Just use synchronize_hardirq() to avoid the might_sleep(), we do not
    yet have threaded-irq to worry about.
    Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
    Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
    Cc: Michel Thierry <michel.thierry@intel.com>
    Cc: Michał Winiarski <michal.winiarski@intel.com>
    Cc: Jeff McGee <jeff.mcgee@intel.com>
    Link: https://patchwork.freedesktop.org/patch/msgid/20180322073533.5313-4-chris@chris-wilson.co.ukReviewed-by: default avatarJeff McGee <jeff.mcgee@intel.com>
    0f36a85c
intel_uncore.c 65 KB