• Martin Schwidefsky's avatar
    s390/mm,tlb: correct tlb flush on page table upgrade · 10607864
    Martin Schwidefsky authored
    The IDTE instruction used to flush TLB entries for a specific address
    space uses the address-space-control element (ASCE) to identify
    affected TLB entries. The upgrade of a page table adds a new top
    level page table which changes the ASCE. The TLB entries associated
    with the old ASCE need to be flushed and the ASCE for the address space
    needs to be replaced synchronously on all CPUs which currently use it.
    The concept of a lazy ASCE update with an exception handler is broken.
    Signed-off-by: default avatarMartin Schwidefsky <schwidefsky@de.ibm.com>
    10607864
entry.h 2.51 KB