• Russell King's avatar
    [ARM] omap: add support for bypassing DPLLs · c0bf3132
    Russell King authored
    This roughly corresponds with OMAP commits: 7d06c48, 3241b19,
    88b5d9b, 18a5500, 9c909ac, 5c6497b, 8b1f0bd, 2ac1da8.
    
    For both OMAP2 and OMAP3, we note the reference and bypass clocks in
    the DPLL data structure.  Whenever we modify the DPLL rate, we first
    ensure that both the reference and bypass clocks are enabled.  Then,
    we decide whether to use the reference and DPLL, or the bypass clock
    if the desired rate is identical to the bypass rate, and program the
    DPLL appropriately.  Finally, we update the clock's parent, and then
    disable the unused clocks.
    
    This keeps the parents correctly balanced, and more importantly ensures
    that the bypass clock is running whenever we reprogram the DPLL.  This
    is especially important because the procedure for reprogramming the DPLL
    involves switching to the bypass clock.
    Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
    c0bf3132
clock.h 4.27 KB