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Anssi Hannula authored
Xilinx CAN FD cores are different enough from the previous Zynq and AXI CAN cores that some refactoring of the driver is needed. This commit contains most of the required refactoring to existing code and should not alter behavior on existing supported HW. The changes are: - Reading and writing to frame registers is parametrized to allow reading/writing a different frame in the future. - Slightly misleading (as it did not specify *all* the interrupts supported by the HW) XCAN_INTR_ALL is replaced with specifying the interrupts inline in interrupt enabling code. - xcan_devtype_data.caps is renamed to xcan_devtype_data.flags to allow for flags that define alternative functionality (e.g. mailboxes vs. FIFO) instead of purely additive capabilities. - can_bittiming_const is added to xcan_devtype_data as CAN FD cores will have wider setting ranges. - bus_clk clock name is now determined through xcan_devtype_data instead of comparing compatible string in probe(). - xcan_devtype_data is added to xcan_priv to allow flag checks after probe(). - XCAN_CAP_WATERMARK is now XCAN_FLAG_TXFEMP. CAN FD cores have watermark support but no TXFEMP interrupt, which is what we are actually interested in. - xcan_start_xmit() is split to in two parts to prepare for TX mailboxes instead of FIFO in CAN FD cores. v2: Wrapped some long lines in xcan_write_frame(). Signed-off-by: Anssi Hannula <anssi.hannula@bitwise.fi> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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