• John Hsu's avatar
    ASoC: nau8540: improve FLL performance · fe83b1b7
    John Hsu authored
    Add these parameters to improve the FLL performance.
    The comments show as follows:
    
    (1)ICTRL_LATCH: FLL DSP speed capability control
    When FLL running at high frequency with long decimal number, DSP needs
    to operate at high speed. FLL DSP can optimize between performance and
    power consumption by ICTRL_LATCH.(111 has highest power consumption.)
    The default setting can be used to reduce power.
    (2)CUTOFF500: loop filter cutoff frequency at 500Khz
    It will give the best FLL performance but highest power consumption
    to enable the cutoff frequency. FLL Loop Filter enable to reduce FLL
    output noise, especially,(DCO frequency)/(FLL input reference frequency)
    is not a integer.
    (3)GAIN_ERR: FLL gain error correction threshold setting
    The threshold is comparison between DCO and target frequency.
    The value 1111 has the most sensitive threshold, that is, 1111 can have
    the most accurate DCO to target frequency. However, the gain error setting
    conditionally and inversely depends on FLL input reference clock rate.
    Higher FLL reference input frequency can only set lower gain error, such
    as 0000 for input reference from MCLK=12.288Mhz. On the other side, if FLL
    reference input is from Frame Sync, 48KHz, higher error gain can apply
    such as 1111.
    Signed-off-by: default avatarJohn Hsu <KCHSU0@nuvoton.com>
    Signed-off-by: default avatarMark Brown <broonie@kernel.org>
    fe83b1b7
nau8540.c 26.6 KB