• Marcel Ziswiler's avatar
    ARM: tegra: apalis_t30: enable emmc ddr52 mode · 200be313
    Marcel Ziswiler authored
    Add mmc-ddr-1_8v property enabling eMMC DDR52 mode.
    
    root@apalis-t30:~# cat /sys/kernel/debug/mmc1/ios
    clock:          52000000 Hz
    actual clock:   52000000 Hz
    vdd:            21 (3.3 ~ 3.4 V)
    bus mode:       2 (push-pull)
    chip select:    0 (don't care)
    power mode:     2 (on)
    bus width:      3 (8 bits)
    timing spec:    8 (mmc DDR52)
    signal voltage: 1 (1.80 V)
    driver type:    0 (driver type B)
    root@apalis-t30:~# hdparm -t /dev/mmcblk1
    
    /dev/mmcblk1:
     Timing buffered disk reads: 232 MB in  3.01 seconds =  77.10 MB/sec
    Signed-off-by: default avatarMarcel Ziswiler <marcel.ziswiler@toradex.com>
    Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
    200be313
tegra30-apalis.dtsi 30.3 KB