• Masahiro Yamada's avatar
    mtd: nand: denali: support HW_ECC_FIXUP capability · 24715c74
    Masahiro Yamada authored
    Some old versions of the Denali IP (perhaps used only for Intel?)
    detects ECC errors and provides correct data via a register, but
    does not touch the transferred data.  So, the software must fixup
    the data in the buffer according to the provided ECC correction
    information.
    
    Newer versions perform ECC correction before transferring the data.
    No more software intervention is needed.  The ECC_ERROR_ADDRESS and
    ECC_CORRECTION_INFO registers were deprecated.  Instead, the number
    of corrected bit-flips are reported via the ECC_COR_INFO register.
    When an uncorrectable ECC error happens, a status flag is set to the
    INTR_STATUS and ECC_COR_INFO registers.
    
    As is often the case with this IP, the register view of INTR_STATUS
    had broken compatibility.
    
    For older versions (SW ECC fixup):
      bit 0:  ECC_TRANSACTION_DONE
      bit 1:  ECC_ERR
    
    For newer versions (HW ECC fixup):
      bit 0:  ECC_UNCOR_ERR
      bit 1:  Reserved
    
    Due to this difference, the irq_mask must be fixed too.
    
    The existing handle_ecc() has been renamed to denali_sw_ecc_fixup()
    for clarification.
    
    What is unfortunate with this feature is we can not know the total
    number of corrected/uncorrected errors in a page.  The register
    ECC_COR_INFO reports the maximum of per-sector bitflips.  This is
    useful for ->read_page return value, but ecc_stats.{corrected,failed}
    increments may not be precise.
    Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
    Signed-off-by: default avatarBoris Brezillon <boris.brezillon@free-electrons.com>
    24715c74
denali.h 10.1 KB