Tested on pSeries and iSeries.  Some future plans for VSID allocation may
mean we have to take this out again, but that's a while off yet, and in the
meantime it's a significant speedup.

This patch makes the PPC64 SLB miss handler run in real mode (i.e.  MMU
off) for it's whole duration, on pSeries machines.  Avoiding the rfid used
to turn relocation on saves some 70-80 cycles on Power4 and Power5.  Not
having to save and restore SRR0 and SRR1 saves a few more, and means we
don't need an extra save slot for r3.  Overall there's around a 27% speedup
on Power4.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>