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Varadarajan Narayanan authored
Presently, the phy pipe clock's name is assumed to be either usb3_phy_pipe_clk_src or pcie_XX_pipe_clk_src (where XX is the phy lane's number). However, this will not work if an SoC has more than one instance of the phy. Hence, instead of assuming the name of the clock, fetch it from the DT. Reviewed-by:
Vivek Gautam <vivek.gautam@codeaurora.org> Signed-off-by:
Varadarajan Narayanan <varada@codeaurora.org> Signed-off-by:
Kishon Vijay Abraham I <kishon@ti.com>
2a9316b0