• Benjamin Poirier's avatar
    e1000e: Fix msi-x interrupt automask · 0a8047ac
    Benjamin Poirier authored
    Since the introduction of 82574 support in e1000e, the driver has worked
    on the assumption that msi-x interrupt generation is automatically
    disabled after each irq. As it turns out, this is not the case.
    Currently, rx interrupts can fire multiple times before and during napi
    processing. This can be a problem for users because frames that arrive
    in a certain window (after adapter->clean_rx() but before
    napi_complete_done() has cleared NAPI_STATE_SCHED) generate an interrupt
    which does not lead to napi_schedule(). These frames sit in the rx queue
    until another frame arrives (a tcp retransmit for example).
    
    While the EIAC and CTRL_EXT registers are properly configured for irq
    automask, the modification of IAM in e1000_configure_msix() is what
    prevents automask from working as intended.
    
    This patch removes that erroneous write and fixes interrupt rearming for
    tx interrupts. It also clears IAME from CTRL_EXT. This is not strictly
    necessary for operation of the driver but it is to avoid disruption from
    potential programs that access the registers directly, like `ethregs -c`.
    Reported-by: default avatarFrank Steiner <steiner-reg@bio.ifi.lmu.de>
    Signed-off-by: default avatarBenjamin Poirier <bpoirier@suse.com>
    Tested-by: default avatarAaron Brown <aaron.f.brown@intel.com>
    Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
    0a8047ac
netdev.c 211 KB