• Paul Mackerras's avatar
    [PATCH] Handle altivec assist exception properly · 7a08473b
    Paul Mackerras authored
    This is the PPC64 counterpart of the PPC32 Altivec assist exception
    handler that went in recently.
    
    On PPC64 machines with Altivec (i.e.  machines that use the PPC970 chip,
    such as the G5 powermac), the altivec floating-point instructions can
    operate in two modes: one where denormalized inputs or outputs are
    truncated to zero, and one where they aren't.  In the latter mode the
    processor can take an exception when it encounters denormalized
    floating-point inputs or outputs rather than dealing with them in
    hardware.
    
    This patch adds code to deal properly with the exception, by emulating
    the instruction that caused the exception.  Previously the kernel just
    switched the altivec unit into the truncate-to-zero mode, which works
    but is a bit gross.  Fortunately there are only a limited set of altivec
    instructions which can generate the assist exception, so we don't have
    to emulate the whole altivec instruction set.
    
    Note that Altivec is Motorola's name for the PowerPC vector/SIMD
    instructions; IBM calls the same thing VMX, and currently only IBM makes
    64-bit PowerPC CPU chips.  Nevertheless, I have used the term Altivec in
    the PPC64 code for consistency with the PPC32 code.
    Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
    Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
    7a08473b
vecemu.c 8.4 KB