• Jeff Garzik's avatar
    [libata] create, and use, ->irq_clear hook · ea21e4ac
    Jeff Garzik authored
    This is more conservative in general, and so applies to multiple
    controllers.  Specifically it attempts to address irq-related issues
    on the Intel ICH5/6 hardware.  On Intel ICH5/6, the BMDMA 'interrupt'
    status bit will be set even on non-DMA commands, which software
    (and I) did not expect.
    
    This change clears pending interrupts once upon initialization,
    and then each time ata_irq_on() is called.
    ea21e4ac
sata_sis.c 8.01 KB