• Thierry Reding's avatar
    clk: tegra: Fix initial rate for pll_a on Tegra124 · 4d3d6417
    Thierry Reding authored
    pll_a_out0 and the I2S clocks are already configured to default to rates
    corresponding to a 44.1 kHz sampling rate, but the pll_a configuration
    was set to a default that is not listed in the frequency table, which
    caused the PLL code to compute an invalid configuration. As a result of
    this invalid configuration, Jetson TK1 fails to resume from suspend.
    
    This used to get papered over because the ASoC driver would force audio
    clocks to a 44.1 kHz configuration on boot. However, that's not really
    necessary and was hence removed in commit ff5d18cb ("ASoC: tegra:
    Enable audio mclk during tegra_asoc_utils_init()").
    
    Fix the initial rate for pll_a so that it matches the 44.1 kHz entry in
    the pll_a frequency table.
    
    Fixes: ff5d18cb ("ASoC: tegra: Enable audio mclk during tegra_asoc_utils_init()")
    Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
    Link: https://lkml.kernel.org/r/20200505071655.644773-1-thierry.reding@gmail.comSigned-off-by: default avatarStephen Boyd <sboyd@kernel.org>
    4d3d6417
clk-tegra124.c 56.3 KB