• David S. Miller's avatar
    [SPARC64]: Elminate all usage of hard-coded trap globals. · 56fb4df6
    David S. Miller authored
    UltraSPARC has special sets of global registers which are switched to
    for certain trap types.  There is one set for MMU related traps, one
    set of Interrupt Vector processing, and another set (called the
    Alternate globals) for all other trap types.
    
    For what seems like forever we've hard coded the values in some of
    these trap registers.  Some examples include:
    
    1) Interrupt Vector global %g6 holds current processors interrupt
       work struct where received interrupts are managed for IRQ handler
       dispatch.
    
    2) MMU global %g7 holds the base of the page tables of the currently
       active address space.
    
    3) Alternate global %g6 held the current_thread_info() value.
    
    Such hardcoding has resulted in some serious issues in many areas.
    There are some code sequences where having another register available
    would help clean up the implementation.  Taking traps such as
    cross-calls from the OBP firmware requires some trick code sequences
    wherein we have to save away and restore all of the special sets of
    global registers when we enter/exit OBP.
    
    We were also using the IMMU TSB register on SMP to hold the per-cpu
    area base address, which doesn't work any longer now that we actually
    use the TSB facility of the cpu.
    
    The implementation is pretty straight forward.  One tricky bit is
    getting the current processor ID as that is different on different cpu
    variants.  We use a stub with a fancy calling convention which we
    patch at boot time.  The calling convention is that the stub is
    branched to and the (PC - 4) to return to is in register %g1.  The cpu
    number is left in %g6.  This stub can be invoked by using the
    __GET_CPUID macro.
    
    We use an array of per-cpu trap state to store the current thread and
    physical address of the current address space's page tables.  The
    TRAP_LOAD_THREAD_REG loads %g6 with the current thread from this
    table, it uses __GET_CPUID and also clobbers %g1.
    
    TRAP_LOAD_IRQ_WORK is used by the interrupt vector processing to load
    the current processor's IRQ software state into %g6.  It also uses
    __GET_CPUID and clobbers %g1.
    
    Finally, TRAP_LOAD_PGD_PHYS loads the physical address base of the
    current address space's page tables into %g7, it clobbers %g1 and uses
    __GET_CPUID.
    
    Many refinements are possible, as well as some tuning, with this stuff
    in place.
    Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
    56fb4df6
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