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Lendacky, Thomas authored
Currently, the Rx and Tx fifos are evenly allocated between the hardware queues of the device. As more queues are instantiated, the fifo memory needs to be able to be allocated based on queue priority. This allows for higher priority queues to have more fifo memory than lower priority queues. Prepare for this by modifying the current fifo calculation to assign the fifo queue allocation in an array that is then used to program the hardware. Signed-off-by:
Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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