• Shannon Nelson's avatar
    [IOAT]: Remove redundant struct member to avoid descriptor cache miss · 54a09feb
    Shannon Nelson authored
    The layout for struct ioat_desc_sw is non-optimal and causes an extra
    cache hit for every descriptor processed.  By tightening up the struct
    layout and removing one item, we pull in the fields that get used in
    the speedpath and get a little better performance.
    
    
    Before:
    -------
    struct ioat_desc_sw {
    	struct ioat_dma_descriptor * hw;                 /*     0     8
    */
    	struct list_head           node;                 /*     8    16
    */
    	int                        tx_cnt;               /*    24     4
    */
    
    	/* XXX 4 bytes hole, try to pack */
    
    	dma_addr_t                 src;                  /*    32     8
    */
    	__u32                      src_len;              /*    40     4
    */
    
    	/* XXX 4 bytes hole, try to pack */
    
    	dma_addr_t                 dst;                  /*    48     8
    */
    	__u32                      dst_len;              /*    56     4
    */
    
    	/* XXX 4 bytes hole, try to pack */
    
    	/* --- cacheline 1 boundary (64 bytes) --- */
    	struct dma_async_tx_descriptor async_tx;         /*    64   144
    */
    	/* --- cacheline 3 boundary (192 bytes) was 16 bytes ago --- */
    
    	/* size: 208, cachelines: 4 */
    	/* sum members: 196, holes: 3, sum holes: 12 */
    	/* last cacheline: 16 bytes */
    };	/* definitions: 1 */
    
    
    After:
    ------
    
    struct ioat_desc_sw {
    	struct ioat_dma_descriptor * hw;                 /*     0     8
    */
    	struct list_head           node;                 /*     8    16
    */
    	int                        tx_cnt;               /*    24     4
    */
    	__u32                      len;                  /*    28     4
    */
    	dma_addr_t                 src;                  /*    32     8
    */
    	dma_addr_t                 dst;                  /*    40     8
    */
    	struct dma_async_tx_descriptor async_tx;         /*    48   144
    */
    	/* --- cacheline 3 boundary (192 bytes) --- */
    
    	/* size: 192, cachelines: 3 */
    };	/* definitions: 1 */
    Signed-off-by: default avatarShannon Nelson <shannon.nelson@intel.com>
    Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
    54a09feb
ioatdma.c 22.3 KB