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Shawn Guo authored
Let's say clock A and B are two gate clocks that share the same register bit in hardware. Therefore they are registered as shared gate clocks with imx_clk_gate2_shared(). In a scenario that only clock A is enabled by clk_enable(A) while B is not used, the shared gate will be unexpectedly disabled in hardware. It happens because clk_enable(A) increments the share_count from 0 to 1, while clock B is unused to clock core, and therefore the core function will just disable B by calling clk->ops->disable() directly. The consequence of that call is share_count is decremented to 0 and the gate is disabled in hardware, even though clock A is still in use. The patch fixes the issue by initializing the share_count per hardware state and returns enable state per share_count from .is_enabled() hook, in case it's a shared gate. While at it, add a check in clk_gate2_disable() to ensure it's never called with a zero share_count. Reported-by:
Fabio Estevam <fabio.estevam@freescale.com> Fixes: f9f28cdf ("ARM: imx: add shared gate clock support") Signed-off-by:
Shawn Guo <shawn.guo@freescale.com> Tested-by:
Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by:
Olof Johansson <olof@lixom.net>
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