• Jacob Pan's avatar
    iommu/vt-d: Fix pasid table size encoding · 65ca7f5f
    Jacob Pan authored
    Different encodings are used to represent supported PASID bits
    and number of PASID table entries.
    The current code assigns ecap_pss directly to extended context
    table entry PTS which is wrong and could result in writing
    non-zero bits to the reserved fields. IOMMU fault reason
    11 will be reported when reserved bits are nonzero.
    This patch converts ecap_pss to extend context entry pts encoding
    based on VT-d spec. Chapter 9.4 as follows:
     - number of PASID bits = ecap_pss + 1
     - number of PASID table entries = 2^(pts + 5)
    Software assigned limit of pasid_max value is also respected to
    match the allocation limitation of PASID table.
    
    cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
    cc: Ashok Raj <ashok.raj@intel.com>
    Signed-off-by: default avatarJacob Pan <jacob.jun.pan@linux.intel.com>
    Tested-by: default avatarMika Kuoppala <mika.kuoppala@intel.com>
    Fixes: 2f26e0a9 ('iommu/vt-d: Add basic SVM PASID support')
    Signed-off-by: default avatarJoerg Roedel <jroedel@suse.de>
    65ca7f5f
intel-iommu.c 137 KB