• Adrian Hunter's avatar
    x86/insn: Add AVX-512 support to the instruction decoder · 25af37f4
    Adrian Hunter authored
    Add support for Intel's AVX-512 instructions to the instruction decoder.
    
    AVX-512 instructions are documented in Intel Architecture Instruction
    Set Extensions Programming Reference (February 2016).
    
    AVX-512 instructions are identified by a EVEX prefix which, for the
    purpose of instruction decoding, can be treated as though it were a
    4-byte VEX prefix.
    
    Existing instructions which can now accept an EVEX prefix need not be
    further annotated in the op code map (x86-opcode-map.txt). In the case
    of new instructions, the op code map is updated accordingly.
    
    Also add associated Mask Instructions that are used to manipulate mask
    registers used in AVX-512 instructions.
    
    The 'perf tools' instruction decoder is updated in a subsequent patch.
    And a representative set of instructions is added to the perf tools new
    instructions test in a subsequent patch.
    Signed-off-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
    Acked-by: default avatarIngo Molnar <mingo@kernel.org>
    Acked-by: default avatarMasami Hiramatsu <mhiramat@kernel.org>
    Cc: Andy Lutomirski <luto@amacapital.net>
    Cc: Dan Williams <dan.j.williams@intel.com>
    Cc: H. Peter Anvin <hpa@zytor.com>
    Cc: Jiri Olsa <jolsa@redhat.com>
    Cc: Thomas Gleixner <tglx@linutronix.de>
    Cc: X86 ML <x86@kernel.org>
    Link: http://lkml.kernel.org/r/1469003437-32706-3-git-send-email-adrian.hunter@intel.comSigned-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
    25af37f4
gen-insn-attr-x86.awk 9.52 KB