• Mahesh Kumar's avatar
    drm/i915/skl+: consider max supported plane pixel rate while scaling · 73b0ca8e
    Mahesh Kumar authored
    A display resolution is only supported if it meets all the restrictions
    below for Maximum Pipe Pixel Rate.
    
    The display resolution must fit within the maximum pixel rate output
    from the pipe. Make sure that the display pipe is able to feed pixels at
    a rate required to support the desired resolution.
    For each enabled plane on the pipe {
        If plane scaling enabled {
    	Horizontal down scale amount = Maximum[1, plane horizontal size /
    		    scaler horizontal window size]
    	Vertical down scale amount = Maximum[1, plane vertical size /
    		    scaler vertical window size]
    	Plane down scale amount = Horizontal down scale amount *
    		    Vertical down scale amount
    	Plane Ratio = 1 / Plane down scale amount
        }
        Else {
    	Plane Ratio = 1
        }
        If plane source pixel format is 64 bits per pixel {
    	Plane Ratio = Plane Ratio * 8/9
        }
    }
    
    Pipe Ratio = Minimum Plane Ratio of all enabled planes on the pipe
    
    If pipe scaling is enabled {
        Horizontal down scale amount = Maximum[1, pipe horizontal source size /
    		scaler horizontal window size]
        Vertical down scale amount = Maximum[1, pipe vertical source size /
    		scaler vertical window size]
        Note: The progressive fetch - interlace display mode is equivalent to a
    		2.0 vertical down scale
        Pipe down scale amount = Horizontal down scale amount *
    		Vertical down scale amount
        Pipe Ratio = Pipe Ratio / Pipe down scale amount
    }
    
    Pipe maximum pixel rate = CDCLK frequency * Pipe Ratio
    
    In this patch our calculation is based on pipe downscale amount
    (plane max downscale amount * pipe downscale amount) instead of Pipe
    Ratio. So,
    max supported crtc clock with given scaling = CDCLK / pipe downscale.
    Flip will fail if,
    current crtc clock > max supported crct clock with given scaling.
    
    Changes since V1:
     - separate out fixed_16_16 wrapper API definition
    Changes since V2:
     - Fix buggy crtc !active condition (Maarten)
     - use intel_wm_plane_visible wrapper as per Maarten's suggestion
    Changes since V3:
     - Change failure return from ERANGE to EINVAL
    Changes since V4:
     - Rebase based on previous patch changes
    Changes since V5:
     - return EINVAL instead of continue (Maarten)
    Changes since V6:
     - Improve commit message
     - Address review comment
    Changes since V7:
     - use !enable instead of !active
     - rename config variable for consistency (Maarten)
    Signed-off-by: default avatarMahesh Kumar <mahesh1.kumar@intel.com>
    Reviewed-by: default avatarMatt Roper <matthew.d.roper@intel.com>
    Reviewed-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
    Signed-off-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
    Link: http://patchwork.freedesktop.org/patch/msgid/20170526151546.25025-4-mahesh1.kumar@intel.com
    73b0ca8e
intel_drv.h 65 KB