• Tali Perry's avatar
    i2c: npcm7xx: Clear LAST bit after a failed transaction. · 8947efc0
    Tali Perry authored
    Due to a HW issue, in some scenarios the LAST bit might remain set.
    This will cause an unexpected NACK after reading 16 bytes on the next
    read.
    
    Example: if user tries to read from a missing device, get a NACK,
    then if the next command is a long read ( > 16 bytes),
    the master will stop reading after 16 bytes.
    To solve this, if a command fails, check if LAST bit is still
    set. If it does, reset the module.
    
    Fixes: 56a1485b (i2c: npcm7xx: Add Nuvoton NPCM I2C controller driver)
    Signed-off-by: default avatarTali Perry <tali.perry1@gmail.com>
    Signed-off-by: default avatarWolfram Sang <wsa@kernel.org>
    8947efc0
i2c-npcm7xx.c 60.7 KB