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Grazvydas Ignotas authored
The chip TRM documentation contradicts itself about this bit, page 174 of swcu050e says bit should be 0 for clear-on-read behavior, while page 487 says it should be 1. Testing shows it should be 1, so set the .set_cor flag accordingly. This is needed for upcoming BCI charging driver to function. Signed-off-by:
Grazvydas Ignotas <notasas@gmail.com> Acked-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
Samuel Ortiz <sameo@linux.intel.com>
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