Update all the Intel JSON metrics from Ahmad Yasin's TMAM 3.5
for Intel big core from Sandy Bridge to Cascade Lake.

This has many improvements and new metircs

- New TopDownL1_SMT group that provides a per SMT thread version
of --topdown that does not require -a anymore. The drawback is
increased multiplexing though since L1 TopDown does not fit into
4 generic counters anymore.

- Added SMT aware versions of other metrics

- Split SMT aware metrics into separate metrics to avoid
unnecessary event collections

- New metrics for better branch analysis:
Estimated Branch_Mispredict_Costs, Instructions per taken Branch,
Branch Instructions per Taken Branch, etc.

- Instruction mix metrics:
Instructions per load, Instructions per store, Instructions per Branch,
Instructions per Call

- New Cache metrics:
Bandwidth to L1/L2/L3 caches. L1/L2/L3 misses per kilo instructions.
memory level parallelism

- New memory controller metrics:
Normalized memory bandwidth in interval mode, Average memory latency,
Average number of parallel read requests,

- 3DXP persistent memory metrics for Cascade Lake:
3dxp read latency, 3dxp read/write bandwidth

- Some other useful metrics like Instruction Level Parallelism,

- Various other improvements.

Not all metrics are available on all CPUs. Skylake has best coverage.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Cc: Kan Liang <kan.liang@intel.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Link: https://lkml.kernel.org/r/20190315165219.GA21223@tassilo.jf.intel.comSigned-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>