• Jerome Brunet's avatar
    clk: meson: mpll: add init callback and regs · 19855c82
    Jerome Brunet authored
    Until now (gx and axg), the mpll setting on boot (whatever the
    bootloader) was good enough to generate a clean fractional division.
    
    It is not the case on the g12a. While moving away from the vendor u-boot,
    it was noticed the fractional part of the divider was no longer applied.
    Like on the pll, some magic settings need to applied on the mpll
    register.
    
    This change adds the ability to do that on the mpll driver.
    Signed-off-by: default avatarJerome Brunet <jbrunet@baylibre.com>
    19855c82
clk-mpll.c 4.07 KB