• Zachary Amsden's avatar
    [PATCH] x86: ptep_clear optimization · a600388d
    Zachary Amsden authored
    Add a new accessor for PTEs, which passes the full hint from the mmu_gather
    struct; this allows architectures with hardware pagetables to optimize away
    atomic PTE operations when destroying an address space.  Removing the
    locked operation should allow better pipelining of memory access in this
    loop.  I measured an average savings of 30-35 cycles per zap_pte_range on
    the first 500 destructions on Pentium-M, but I believe the optimization
    would win more on older processors which still assert the bus lock on xchg
    for an exclusive cacheline.
    
    Update: I made some new measurements, and this saves exactly 26 cycles over
    ptep_get_and_clear on Pentium M.  On P4, with a PAE kernel, this saves 180
    cycles per ptep_get_and_clear, for a whopping 92160 cycles savings for a
    full address space destruction.
    
    pte_clear_full is not yet used, but is provided for future optimizations
    (in particular, when running inside of a hypervisor that queues page table
    updates, the full hint allows us to avoid queueing unnecessary page table
    update for an address space in the process of being destroyed.
    
    This is not a huge win, but it does help a bit, and sets the stage for
    further hypervisor optimization of the mm layer on all architectures.
    Signed-off-by: default avatarZachary Amsden <zach@vmware.com>
    Cc: Christoph Lameter <christoph@lameter.com>
    Cc: <linux-mm@kvack.org>
    Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
    Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
    a600388d
pgtable.h 14.7 KB