This extra clock is needed to access the registers of the SPI controller
used on Armada 7K/8K SoCs.

This follows the changes already made in the binding documentation (as
well as in the driver) in:
'commit 92ae112e ("spi: orion: Fix clock
resource by adding an optional bus clock")'.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>