• Niklas Schnelle's avatar
    s390/pci: Implement ioremap_wc/prot() with MIO · b02002cc
    Niklas Schnelle authored
    With our current support for the new MIO PCI instructions, write
    combining/write back MMIO memory can be obtained via the pci_iomap_wc()
    and pci_iomap_wc_range() functions.
    This is achieved by using the write back address for a specific bar
    as provided in clp_store_query_pci_fn()
    
    These functions are however not widely used and instead drivers often
    rely on ioremap_wc() and ioremap_prot(), which on other platforms enable
    write combining using a PTE flag set through the pgrprot value.
    
    While we do not have a write combining flag in the low order flag bits
    of the PTE like x86_64 does, with MIO support, there is a write back bit
    in the physical address (bit 1 on z15) and thus also the PTE.
    Which bit is used to toggle write back and whether it is available at
    all, is however not fixed in the architecture. Instead we get this
    information from the CLP Store Logical Processor Characteristics for PCI
    command. When the write back bit is not provided we fall back to the
    existing behavior.
    Signed-off-by: default avatarNiklas Schnelle <schnelle@linux.ibm.com>
    Reviewed-by: default avatarPierre Morel <pmorel@linux.ibm.com>
    Reviewed-by: default avatarGerald Schaefer <gerald.schaefer@linux.ibm.com>
    Signed-off-by: default avatarVasily Gorbik <gor@linux.ibm.com>
    b02002cc
pci_clp.c 15.8 KB