Patch set from Jay Estabrook:

 - include/asm-alpha/dma.h:
	Add MAX_DMA_ADDR for SABLE and ALCOR

 - include/asm-alpha/floppy.h:
	enable the full CROSS_64KB macro for all platforms

 - include/asm-alpha/core_t2.h:
	fix HAE usage

 - arch/alpha/kernel/pci.c:
	fiddle with quirk_cypress

 - arch/alpha/kernel/traps.c:
	prevent opDEC_check() from multiple calls (EV4 SMP SABLEs)

 - arch/alpha/kernel/proto.h:
	make t2_pci_tbi() real

 - arch/alpha/kernel/time.c:
	shorten timeout delay

 - arch/alpha/kernel/sys_alcor.c:
	use ALCOR_MAX_DMA_ADDR because of the 1GB limit on ISA devices

 - arch/alpha/kernel/core_t2.c:
	add S/G support and allow direct-map to handle 2GB of memory

 - arch/alpha/kernel/core_tsunami.c:
	rework alignment requirements for ISA DMA, esp. for ACER platforms

 - arch/alpha/kernel/sys_sable.c:
	fix MAX_DMA_ADDR for the 1GB limitation

 - arch/alpha/kernel/pci_impl.h:
	add T2_DEFAULT_MEM_BASE to help avoid HAE use

 - arch/alpha/kernel/pci_iommu.c:
	fix ISA_DMA_MASK calculation, and force ISA alignment to 64KB