• James Hogan's avatar
    irqchip: mips-gic: Don't treat FDC IRQ as percpu devid · b720fd8b
    James Hogan authored
    Treat the Fast Debug Channel (FDC) interrupt the same as the timer and
    performance counter interrupts. Like them, the FDC IRQ is also per-VPE,
    and also doesn't use a per-CPU device ID yet. Per-CPU device IDs don't
    seem to work with IRQF_SHARED which is needed for compatibility with
    cores which don't route the FDC IRQ through the GIC. For hardware which
    routes FDC IRQs through the GIC this is something that could be added
    later.
    Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
    Cc: Ralf Baechle <ralf@linux-mips.org>
    Cc: Andrew Bresticker <abrestic@chromium.org>
    Cc: Thomas Gleixner <tglx@linutronix.de>
    Cc: Jason Cooper <jason@lakedaemon.net>
    Cc: linux-mips@linux-mips.org
    Cc: linux-kernel@vger.kernel.org
    Patchwork: https://patchwork.linux-mips.org/patch/9141/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
    b720fd8b
irq-mips-gic.c 20.3 KB