• Andi Kleen's avatar
    perf/x86: Handle multiple umask bits for BDW CYCLE_ACTIVITY.* · b7883a1c
    Andi Kleen authored
    The earlier constraint fix for Broadwell CYCLE_ACTIVITY.*
    forced umask 8 to counter 2. For this it used UEVENT,
    to match the complete umask.
    
    The event list for Broadwell has an additional
    STALLS_L1D_PENDIND event that uses umask 8, but also
    sets other bits in the umask.  The earlier strict umask match
    didn't handle this case.
    
    Add a new UBIT_EVENT constraint macro that only matches
    the specified bits in the umask. Then use that macro
    to handle CYCLE_ACTIVITY.* on Broadwell.
    
    The documented event also uses cmask, but there's no
    need to let the event scheduler know about the cmask,
    as the scheduling restriction is only tied to the umask.
    Reported-by: default avatarGrant Ayers <ayers@cs.stanford.edu>
    Signed-off-by: default avatarAndi Kleen <ak@linux.intel.com>
    Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
    Cc: Arnaldo Carvalho de Melo <acme@redhat.com>
    Cc: Jiri Olsa <jolsa@redhat.com>
    Cc: Linus Torvalds <torvalds@linux-foundation.org>
    Cc: Mike Galbraith <efault@gmx.de>
    Cc: Peter Zijlstra <peterz@infradead.org>
    Cc: Stephane Eranian <eranian@google.com>
    Cc: Thomas Gleixner <tglx@linutronix.de>
    Cc: Vince Weaver <vincent.weaver@maine.edu>
    Link: http://lkml.kernel.org/r/1447719667-9998-1-git-send-email-andi@firstfloor.org
    [ Filled in the missing email address of Grant Ayers - hopefully I got the right one. ]
    Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
    b7883a1c
perf_event_intel.c 101 KB