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Luis R. Rodriguez authored
Generated using the new shiny intivals-tool [1]: initvals -w -f ar9003 > ar9003_initvals.h The respective checksums are: 0x000000005a76829d ar9300_2p0_radio_postamble 0x000000009d90cb74 ar9300Modes_lowest_ob_db_tx_gain_table_2p0 0x00000000e0bc2c84 ar9300Modes_fast_clock_2p0 0x00000000852fca34 ar9300_2p0_radio_core 0x0000000000000000 ar9300Common_rx_gain_table_merlin_2p0 0x0000000078658fb5 ar9300_2p0_mac_postamble 0x0000000023235333 ar9300_2p0_soc_postamble 0x0000000054d41904 ar9200_merlin_2p0_radio_core 0x00000000618455d4 ar9300_2p0_baseband_postamble 0x000000009aa590a4 ar9300_2p0_baseband_core 0x000000004783d946 ar9300Modes_high_power_tx_gain_table_2p0 0x000000006681db44 ar9300Modes_high_ob_db_tx_gain_table_2p0 0x000000001f318700 ar9300Common_rx_gain_table_2p0 0x000000009990cb74 ar9300Modes_low_ob_db_tx_gain_table_2p0 0x00000000c9d66d40 ar9300_2p0_mac_core 0x0000000039139500 ar9300Common_wo_xlna_rx_gain_table_2p0 0x00000000a0c54980 ar9300_2p0_soc_preamble 0x00000000292e2544 ar9300PciePhy_pll_on_clkreq_disable_L1_2p0 0x000000002d3e2544 ar9300PciePhy_clkreq_enable_L1_2p0 0x00000000293e2544 ar9300PciePhy_clkreq_disable_L1_2p0 [1] http://wireless.kernel.org/en/users/Drivers/ath9k_hw/initvals-tool Cc: Tom Hammel <thammel@atheros.com> Cc: Enis Akay <Enis.Akay@Atheros.com> Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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