• Dirk Brandewie's avatar
    intel_pstate: add sample time scaling · c4ee841f
    Dirk Brandewie authored
    The PID assumes that samples are of equal time, which for a deferable
    timers this is not true when the system goes idle.  This causes the
    PID to take a long time to converge to the min P state and depending
    on the pattern of the idle load can make the P state appear stuck.
    
    The hold-off value of three sample times before using the scaling is
    to give a grace period for applications that have high performance
    requirements and spend a lot of time idle,  The poster child for this
    behavior is the ffmpeg benchmark in the Phoronix test suite.
    
    Cc: 3.14+ <stable@vger.kernel.org> # 3.14+
    Signed-off-by: default avatarDirk Brandewie <dirk.j.brandewie@intel.com>
    Signed-off-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
    c4ee841f
intel_pstate.c 22.6 KB