• Aravind Gopalakrishnan's avatar
    amd64_edac: Modify usage of amd64_read_dct_pci_cfg() · 7981a28f
    Aravind Gopalakrishnan authored
    Rationale behind this change:
     - F2x1xx addresses were stopped from being mapped explicitly to DCT1
       from F15h (OR) onwards. They use _dct[0:1] mechanism to access the
       registers. So we should move away from using address ranges to select
       DCT for these families.
     - On newer processors, the address ranges used to indicate DCT1 (0x140,
       0x1a0) have different meanings than what is assumed currently.
    
    Changes introduced:
     - amd64_read_dct_pci_cfg() now takes in dct value and uses it for
       'selecting the dct'
     - Update usage of the function. Keep in mind that different families
       have specific handling requirements
     - Remove [k8|f10]_read_dct_pci_cfg() as they don't do much different
       from amd64_read_pci_cfg()
       - Move the k8 specific check to amd64_read_pci_cfg
     - Remove f15_read_dct_pci_cfg() and move logic to amd64_read_dct_pci_cfg()
     - Remove now needless .read_dct_pci_cfg
    
    Testing:
     - Tested on Fam 10h; Fam15h Models: 00h, 30h; Fam16h using 'EDAC_DEBUG'
       and mce_amd_inj
     - driver obtains info from F2x registers and caches it in pvt
       structures correctly
     - ECC decoding works fine
    Signed-off-by: default avatarAravind Gopalakrishnan <aravind.gopalakrishnan@amd.com>
    Link: http://lkml.kernel.org/r/1410799058-3149-1-git-send-email-aravind.gopalakrishnan@amd.comSigned-off-by: default avatarBorislav Petkov <bp@suse.de>
    7981a28f
amd64_edac.h 15.2 KB