• Zachary Amsden's avatar
    [PATCH] i386: use set_pte macros in a couple places where they were missing · c9b02a24
    Zachary Amsden authored
    Also, setting PDPEs in PAE mode does not require atomic operations, since the
    PDPEs are cached by the processor, and only reloaded on an explicit or
    implicit reload of CR3.
    
    Since the four PDPEs must always be present in an active root, and the kernel
    PDPE is never updated, we are safe even from SMIs and interrupts / NMIs using
    task gates (which reload CR3).  Actually, much of this is moot, since the user
    PDPEs are never updated either, and the only usage of task gates is by the
    doublefault handler.  It appears the only place PGDs get updated in PAE mode
    is in init_low_mappings() / zap_low_mapping() for initial page table creation
    and recovery from ACPI sleep state, and these sites are safe by inspection.
    Getting rid of the cmpxchg8b saves code space and 720 cycles in pgd_alloc on
    P4.
    Signed-off-by: default avatarZachary Amsden <zach@vmware.com>
    Signed-off-by: default avatarAndrew Morton <akpm@osdl.org>
    Signed-off-by: default avatarLinus Torvalds <torvalds@osdl.org>
    c9b02a24
pageattr.c 5.48 KB