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Geert Uytterhoeven authored
Now debug resource reset is handled properly, allow booting secondary CPU cores when hardware debug mode is enabled (MD21=1) on SoCs using the "renesas,apmu" enable method. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Hiep Cao Minh <cm-hiep@jinso.co.jp> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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