• Thomas Petazzoni's avatar
    ARM: mvebu: introduce CPU reset code · 3f20fb11
    Thomas Petazzoni authored
    The Armada 370 and Armada XP have registers that allow to reset the
    CPUs, which is particularly useful to take the secondary CPUs out of
    reset in the context of the SMP support.
    
    Unfortunately, an implementation mistake was originally made and the
    support for these registers was integrated into the PMSU driver, which
    is in fact completely unrelated. And it turns out that the Armada 375
    has the same CPU reset registers, but does not have the PMSU
    registers.
    
    Therefore, this commit creates a small CPU reset driver. All it does
    is provide a simple mvebu_cpu_reset_deassert() function that the SMP
    support code can call to take secondary CPUs out of reset. As of this
    commit, the driver isn't being used, it will be used through changes
    in the following commits.
    
    Note that we initially planned to use the 'reset controller'
    framework, but it requires the addition of "resets" properties in the
    Device Tree, which are causing too many problems if we want to keep
    the Device Tree backward compatibility. Moreover, the 'reset
    controller' framework is mainly useful when a device driver needs to
    request a reset of its device from a separate reset controller. In our
    case, the CPU reset handling and the SMP core code are both located in
    arch/arm/mach-mvebu/ and are tightly linked together, so there's no
    real benefit in going through a separate framework.
    Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
    Link: https://lkml.kernel.org/r/1397483433-25836-2-git-send-email-thomas.petazzoni@free-electrons.comSigned-off-by: default avatarJason Cooper <jason@lakedaemon.net>
    3f20fb11
common.h 668 Bytes