• Rodrigo Vivi's avatar
    drm/i915: Introduce FBC False Color for debug purposes. · da46f936
    Rodrigo Vivi authored
    With this bit enabled, HW changes the color when compressing frames for
    debug purposes.
    
    ALthough the simple way to enable a single bit is over intel_reg_write,
    this value is overwriten on next update_fbc so depending on the workload
    it is not possible to set this bit with intel-gpu-tools. So this patch
    introduces a persistent way to enable false color over debugfs.
    
    v2: Use DEFINE_SIMPLE_ATTRIBUTE as Daniel suggested
    v3: (Ville) only do false color for IVB+ since according to spec bit is
        MBZ before IVB.
    v4: We don't have FBC on valleyview nor on cherryview (Ben)
    v5: s/!HAS_PCH_SPLIT/!HAS_FBC (Ville)
    
    Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
    Reviewed-by: default avatarBen Widawsky <ben@bwidawsk.net>
    Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
    Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
    da46f936
intel_pm.c 205 KB