Add documentation to describe Xilinx Versal clock driver
bindings.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lkml.kernel.org/r/1575527759-26452-2-git-send-email-rajan.vaja@xilinx.comSigned-off-by: Stephen Boyd <sboyd@kernel.org>